SN

Samuel D. Naffziger

HP HP: 95 patents #95 of 16,619Top 1%
AM AMD: 55 patents #114 of 9,279Top 2%
Globalfoundries: 5 patents #673 of 4,424Top 20%
IN Intel: 2 patents #13,213 of 30,777Top 45%
Overall (All Time): #6,121 of 4,157,543Top 1%
151
Patents All Time

Issued Patents All Time

Showing 25 most recent of 151 patents

Patent #TitleCo-InventorsDate
12361628 Configurable multiple-die graphics processing unit Mark Fowler, Michael Mantor, Mark Leather 2025-07-15
12298829 Platform power manager for rack level power and thermal constraints Indrani Paul, Sriram Sambamurthy, Larry D. Hewitt, Kevin M. Lepak, Adam Neil Calder Clark +6 more 2025-05-13
12266585 Arrangement and thermal management of 3D stacked dies John Wuu, Patrick J. Shyvers, Milind S. Bhagavat, Kaushik Mysore, Brett P. Wilkerson 2025-04-01
12073806 Refreshing displays using on-die cache Ashish Jain, Dhirendra Partap Singh Rana, Gia Tung Phan, Benjamin Tsien 2024-08-27
11960340 Performance management during power supply voltage droop Eric J. Chapman, Stephen V. Kosonocky, Kaushik Mazumdar, Vydhyanathan Kalyanasundharam, Eric M. Scott 2024-04-16
11841803 GPU chiplets using high bandwidth crosslinks Skyler Jonathon Saleh, Milind S. Bhagavat, Rahul Agarwal 2023-12-12
11703930 Platform power manager for rack level power and thermal constraints Indrani Paul, Sriram Sambamurthy, Larry D. Hewitt, Kevin M. Lepak, Adam Neil Calder Clark +6 more 2023-07-18
11462294 Mission mode Vmin prediction and calibration Ashish Jain, Sriram Sundaram 2022-10-04
11189540 Arrangement and thermal management of 3D stacked dies John Wuu, Patrick J. Shyvers, Milind S. Bhagavat, Kaushik Mysore, Brett P. Wilkerson 2021-11-30
11164807 Arrangement and thermal management of 3D stacked dies John Wuu, Patrick J. Shyvers, Milind S. Bhagavat, Kaushik Mysore, Brett P. Wilkerson 2021-11-02
11073888 Platform power manager for rack level power and thermal constraints Indrani Paul, Sriram Sambamurthy, Larry D. Hewitt, Kevin M. Lepak, Adam Neil Calder Clark +6 more 2021-07-27
11054883 Power efficiency optimization in throughput-based workloads Leonardo Piga, Ivan Matosevic, Indrani Paul 2021-07-06
10644826 Flexibile interfaces using through-silicon via technology John Wuu, Michael Kevin Ciraula, Russell Schreiber 2020-05-05
10452554 Adaptive resizable cache/LCM for improved power Ihab Amer, Khaled Mammou, Haibo Liu, Edward A. Harold, Fabio Gulino +4 more 2019-10-22
10431517 Arrangement and thermal management of 3D stacked dies John Wuu, Patrick J. Shyvers, Milind S. Bhagavat, Kaushik Mysore, Brett P. Wilkerson 2019-10-01
10303398 Swizzling in 3D stacked memory John Wuu, Michael Kevin Ciraula, Russell Schreiber 2019-05-28
10060955 Calibrating power supply voltages using reference measurements from code loop executions Aaron Joseph Grenat, Robert A. Hershberger, Sriram Sambamurthy, Christopher E. Tressler, Sho-Chien Kang +6 more 2018-08-28
9958921 Power management to change power limits based on device skin temperature Ashish Jain, Benjamin D. Bates, Ali Akbar Merrikh, Steven F. Liepe, Madhu Saravana Sibi Govindan 2018-05-01
9772676 Adaptive voltage scaling based on stage transitions or ring oscillator revolutions Stephen V. Kosonocky 2017-09-26
9727435 Method and system of sampling to automatically scale digital power estimates with frequency Suresh Periyacheri 2017-08-08
9710034 Using temperature margin to balance performance with power allocation Michael J. Osborn, Sebastien Nussbaum 2017-07-18
9671767 Hybrid system and method for determining performance levels based on thermal conditions within a processor Benjamin D. Bates, Praveen K. Dongara 2017-06-06
9575553 Replica path timing adjustment and normalization for adaptive voltage and frequency scaling Seng Oon Toh, Edward J. McLellan, Stephen V. Kosonocky, Michael L. Golden 2017-02-21
9483092 Performance state boost for multi-core integrated circuit Baomin Liu, Maxat Touzelbaev 2016-11-01
9319037 Self-adjusting clock doubler and integrated circuit clock distribution system using same Arun Sundaresan Iyer, Alok Baluni, Sriram Sambamurthy 2016-04-19