SN

Samuel D. Naffziger

HP HP: 95 patents #95 of 16,619Top 1%
AM AMD: 55 patents #114 of 9,279Top 2%
Globalfoundries: 5 patents #673 of 4,424Top 20%
IN Intel: 2 patents #13,213 of 30,777Top 45%
📍 Fort Collins, CO: #2 of 3,421 inventorsTop 1%
🗺 Colorado: #32 of 40,980 inventorsTop 1%
Overall (All Time): #6,121 of 4,157,543Top 1%
151
Patents All Time

Issued Patents All Time

Showing 51–75 of 151 patents

Patent #TitleCo-InventorsDate
8103941 Low overhead soft error tolerant flip flop 2012-01-24
8086884 System and method for implementing an integrated circuit having dynamically variable power limit 2011-12-27
8037445 System for and method of controlling a VLSI environment Christopher Allan Poirier, Christopher J. Bostak 2011-10-11
8010824 Sampling chip activity for real time power estimation 2011-08-30
8006115 Central processing unit with multiple clock zones and operating method Timothy C. Fischer 2011-08-23
7937563 Voltage droop mitigation through instruction issue throttling Michael G. Butler 2011-05-03
7844838 Inter-die power manager and power management method Christopher Allan Poirier 2010-11-30
7772889 Programmable sample clock for empirical setup time selection 2010-08-10
7772906 Low power flip flop through partially gated slave clock 2010-08-10
7661003 Systems and methods for maintaining performance of an integrated circuit within a working power limit Christopher Allan Poirier 2010-02-09
7599458 System and method to reduce jitter Steven F. Liepe 2009-10-06
7558317 Edge calibration for synchronous data transfer between clock domains Timothy C. Fischer, Benjamin J. Patella 2009-07-07
7533285 Synchronizing link delay measurement over serial links Eric M. Rentschler 2009-05-12
7512825 Responding to DC power degradation Bradley Winick 2009-03-31
7477712 Adaptable data path for synchronous data transfer between clock domains Timothy C. Fischer, Benjamin J. Patella 2009-01-13
7447919 Voltage modulation for increased reliability in an integrated circuit Steven F. Liepe 2008-11-04
7447941 Error recovery systems and methods for execution data paths Don Soltis 2008-11-04
7401245 Count calibration for synchronous data transfer between clock domains Timothy C. Fischer, Benjamin J. Patella 2008-07-15
7394301 System and method for dynamically varying a clock signal Eric Fetzer, Benjamin J. Patella 2008-07-01
7323920 Soft-error rate improvement in a latch using low-pass filtering 2008-01-29
7321482 Sub-circuit voltage manipulation Don Douglas Josephson 2008-01-22
7289587 Repeatability over communication links Eric M. Rentschler 2007-10-30
7276952 Clock signal generation using digital frequency synthesizer Jayen Desai 2007-10-02
7239494 System and method to mitigate voltage fluctuations 2007-07-03
7224563 Method and device for circuit control 2007-05-29