Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9628092 | Apparatus for a monotonic delay line, method for fast locking of a digital DLL with clock stop/start tolerance, apparatus and method for robust clock edge placement, and apparatus and method for clock offset tuning | Erin Francom, Matthew R. Peters, Nicholas J. Denler | 2017-04-18 |
| 9178502 | Apparatus for a monotonic delay line, method for fast locking of a digital DLL with clock stop/start tolerance, apparatus and method for robust clock edge placement, and apparatus and method for clock offset tuning | Erin Francom, Matthew R. Peters, Nicholas J. Denler | 2015-11-03 |
| 9124257 | Digital clock placement engine apparatus and method with duty cycle correction and quadrature placement | Erin Francom, Matthew R. Peters | 2015-09-01 |
| 7873132 | Clock recovery | — | 2011-01-18 |
| 7610526 | On-chip circuitry for bus validation | Derek Alan Sherlock, Chih-Jen Chen | 2009-10-27 |
| 7498858 | Interpolator systems with linearity adjustments and related methods | Bruce A. Doyle | 2009-03-03 |
| 7391221 | On-die impedance calibration | James M. Dewey, David F. Purvis | 2008-06-24 |
| 7276952 | Clock signal generation using digital frequency synthesizer | Samuel D. Naffziger | 2007-10-02 |
| 6583650 | Latching annihilation based logic gate | Samuel D. Naffziger, Reid James Riedlinger | 2003-06-24 |
| 6459304 | Latching annihilation based logic gate | Samuel D. Naffziger, Reid James Riedlinger | 2002-10-01 |