MF

Mark Fowler

AM AMD: 53 patents #124 of 9,279Top 2%
IBM: 3 patents #26,272 of 70,183Top 40%
Overall (All Time): #75,308 of 4,157,543Top 2%
41
Patents All Time

Issued Patents All Time

Showing 25 most recent of 41 patents

Patent #TitleCo-InventorsDate
12406426 Hybrid render with deferred primitive batch binning Michael Mantor, Laurent Lefebvre, Timothy Kelley, Mikko Alho, Mika Tuomi +4 more 2025-09-02
12361628 Configurable multiple-die graphics processing unit Samuel D. Naffziger, Michael Mantor, Mark Leather 2025-07-15
12153958 VMID as a GPU task container for virtualization Anirudh R. Acharya, Michael Mantor, Rex Eldon McCrary, Anthony Asaro, Jeffrey G. Cheng 2024-11-26
12032487 Access log and address translation log for a processor Benjamin T. Sander, Anthony Asaro, Gongxian Jeffrey Cheng, Michael Mantor 2024-07-09
12026380 Dynamic memory reconfiguration Anthony Asaro, Vydhyanathan Kalyanasundharam 2024-07-02
11880926 Hybrid render with deferred primitive batch binning Michael Mantor, Laurent Lefebvre, Timothy Kelley, Mikko Alho, Mika Tuomi +4 more 2024-01-23
11604737 Dynamic modification of coherent atomic memory operations Joseph L. Greathouse, Steven Tony Tye, Milind N. Nemlekar 2023-03-14
11521342 Residency map descriptors Maxim V. Kazakov 2022-12-06
11467870 VMID as a GPU task container for virtualization Anirudh R. Acharya, Michael Mantor, Rex Eldon McCrary, Anthony Asaro, Jeffrey G. Cheng 2022-10-11
11461045 Platform agnostic atomic operations 2022-10-04
11335052 Hybrid render with deferred primitive batch binning Michael Mantor, Laurent Lefebvre, Timothy Kelley, Mikko Alho, Mika Tuomi +4 more 2022-05-17
11288205 Access log and address translation log for a processor Benjamin T. Sander, Anthony Asaro, Gongxian Jeffrey Cheng, Mike Mantor 2022-03-29
11100004 Shared virtual address space for heterogeneous processors Gongxian Jeffrey Cheng, Philip J. Rogers, Benjamin T. Sander, Anthony Asaro, Mike Mantor +1 more 2021-08-24
11074075 Wait instruction for preventing execution of one or more instructions until a load counter or store counter reaches a specified value Brian D. Emberling 2021-07-27
10991146 Residency map descriptors Maxim V. Kazakov 2021-04-27
10943389 Removing or identifying overlapping fragments after z-culling Laurent Lefebvre, Michael Mantor, Mikko Alho, Mika Tuomi, Kiia Kallio +4 more 2021-03-09
10725822 VMID as a GPU task container for virtualization Anirudh R. Acharya, Michael Mantor, Rex Eldon McCrary, Anthony Asaro, Jeffrey G. Cheng 2020-07-28
10540802 Residency map descriptors Maxim V. Kazakov 2020-01-21
10474468 Indicating instruction scheduling mode for processing wavefront portions Michael Mantor, Brian D. Emberling, Mark Leather 2019-11-12
10403333 Memory controller with flexible address decoding Kevin M. Brandl, Thomas H. Hamilton, Hideki Kanayama, Kedarnath Balakrishnan, James R. Magro +1 more 2019-09-03
10169906 Hybrid render with deferred primitive batch binning Michael Mantor, Laurent Lefebvre, Timothy Kelley, Mikko Alho, Mika Tuomi +4 more 2019-01-01
10152434 Efficient arbitration for memory accesses Rostyslav Kyrychynskyi, Anthony Asaro, Kostantinos Danny Christidis, Michael Mantor, Robert Scott Hartog 2018-12-11
9996478 No allocate cache policy 2018-06-12
9934551 Split storage of anti-aliased samples 2018-04-03
9009419 Shared memory space in a unified memory model Anthony Asaro, Kevin Normoyle, Mark Hummel 2015-04-14