Issued Patents All Time
Showing 25 most recent of 42 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12430127 | Vector test decimal instruction for validity testing | Kerstin Claudia Schelm, Petra Leber, Andreas Wagner, Bruce C. Giamei, Timothy J. Slegel +3 more | 2025-09-30 |
| 12190078 | Rounding hexadecimal floating point numbers using binary incrementors | Petra Leber, Cedric Lichtenau, Stefan Payer, Kerstin Claudia Schelm | 2025-01-07 |
| 12056465 | Verifying the correctness of a leading zero counter | Petra Leber, Cedric Lichtenau, Stefan Payer, Kerstin Claudia Schelm | 2024-08-06 |
| 11861325 | Repurposed hexadecimal floating point data path | Nicol Hofmann, Petra Leber, Kerstin Claudia Schelm | 2024-01-02 |
| 11531546 | Hexadecimal floating point multiply and add instruction | Eric M. Schwarz, Stefan Payer, Petra Leber, Kerstin Claudia Schelm, Timothy J. Slegel +2 more | 2022-12-20 |
| 11442726 | Vector pack and unpack instructions | Eric M. Schwarz, Timothy J. Slegel, Jonathan D. Bradbury, Reid T. Copeland, Xin Guo | 2022-09-13 |
| 11314512 | Efficient checking of a condition code anticipator for a floating point processor and/or unit | Petra Leber, Kerstin Claudia Schelm, Cedric Lichtenau | 2022-04-26 |
| 11269651 | Reusing adjacent SIMD unit for fast wide result generation | Nicol Hofmann, Cedric Lichtenau, Osher Yifrach | 2022-03-08 |
| 11188299 | Repurposed hexadecimal floating point data path | Nicol Hofmann, Petra Leber, Kerstin Claudia Schelm | 2021-11-30 |
| 11175890 | Hexadecimal exponent alignment for binary floating point unit | Kerstin Claudia Schelm, Petra Leber, Nicol Hofmann | 2021-11-16 |
| 11159183 | Residue checking of entire normalizer output of an extended result | Nicol Hofmann, Kerstin Claudia Schelm, Razvan Peter Figuli | 2021-10-26 |
| 11099602 | Fault-tolerant clock gating | Razvan Peter Figuli, Cedric Lichtenau, Stefan Payer | 2021-08-24 |
| 10983159 | Method and apparatus for wiring multiple technology evaluation circuits | Stefan Payer, Cedric Lichtenau, Ralf Richter | 2021-04-20 |
| 10890622 | Integrated circuit control latch protection | Stefan Payer, Nicol Hofmann, Cedric Lichtenau | 2021-01-12 |
| 10572223 | Parallel decimal multiplication hardware with a 3x generator | Steven R. Carlough, Michael K. Kroener, Silvia M. Mueller | 2020-02-25 |
| 10558432 | Multiply-add operations of binary numbers in an arithmetic unit | Tina Babinsky, Cedric Lichtenau, Silvia M. Mueller | 2020-02-11 |
| 10416962 | Decimal and binary floating point arithmetic calculations | Steven R. Carlough, Juergen Haess, Klaus M. Kroener, Petra Leber, Silvia M. Mueller +1 more | 2019-09-17 |
| 10372417 | Multiply-add operations of binary numbers in an arithmetic unit | Tina Babinsky, Cedric Lichtenau, Silvia M. Mueller | 2019-08-06 |
| 10310815 | Parallel decimal multiplication hardware with a 3X generator | Steven R. Carlough, Michael K. Kroener, Silvia M. Mueller | 2019-06-04 |
| 10296294 | Multiply-add operations of binary numbers in an arithmetic unit | Tina Babinsky, Cedric Lichtenau, Silvia M. Mueller | 2019-05-21 |
| 10275391 | Combining of several execution units to compute a single wide scalar result | Nicol Hofmann, Cedric Lichtenau | 2019-04-30 |
| 10169451 | Rapid character substring searching | Stefan Payer, Razvan Peter Figuli, Cedric Lichtenau | 2019-01-01 |
| 10140090 | Computing and summing up multiple products in a single multiplier | Manuela Niekisch | 2018-11-27 |
| 9959093 | Binary fused multiply-add floating-point calculations | Klaus M. Kroener, Cedric Lichtenau, Silvia M. Mueller | 2018-05-01 |
| 9952829 | Binary fused multiply-add floating-point calculations | Klaus M. Kroener, Cedric Lichtenau, Silvia M. Mueller | 2018-04-24 |