Issued Patents All Time
Showing 25 most recent of 273 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12223290 | Decimal floating-point instruction in a round-for-reround mode | Martin S. Schmookler | 2025-02-11 |
| 11698772 | Prepare for shorter precision (round for reround) mode in a decimal floating-point instruction | Martin S. Schmookler | 2023-07-11 |
| 11663270 | Vector string search instruction | Cedric Lichtenau, Jonathan D. Bradbury, Razvan Peter Figuli, Stefan Payer | 2023-05-30 |
| 11663004 | Vector convert hexadecimal floating point to scaled decimal instruction | Kerstin Claudia Schelm, Petra Leber, Silvia M. Mueller, Reid T. Copeland, Xin Guo +1 more | 2023-05-30 |
| 11531546 | Hexadecimal floating point multiply and add instruction | Stefan Payer, Petra Leber, Kerstin Claudia Schelm, Michael Klein, Timothy J. Slegel +2 more | 2022-12-20 |
| 11442726 | Vector pack and unpack instructions | Timothy J. Slegel, Jonathan D. Bradbury, Michael Klein, Reid T. Copeland, Xin Guo | 2022-09-13 |
| 11360769 | Decimal scale and convert and split to hexadecimal floating point instruction | Petra Leber, Kerstin Claudia Schelm, Silvia M. Mueller, Reid T. Copeland, Xin Guo +1 more | 2022-06-14 |
| 11327766 | Instruction dispatch routing | Brian W. Thompto, Kurt A. Feiste, Michael J. Genden, Dung Q. Nguyen, Susan E. Eisen | 2022-05-10 |
| 11303456 | Compute digital signature authentication sign instruction | Jonathan D. Bradbury, Edward T. Malley, Christian Jacobi | 2022-04-12 |
| 11182198 | Indicator-based prioritization of transactions | Fadi Y. Busaba, Harold W. Cain, III, Michael K. Gschwind, Valentina Salapura, Timothy Siegel | 2021-11-23 |
| 11157240 | Perform cryptographic computation scalar multiply instruction | Jonathan D. Bradbury, Edward T. Malley, Christian Jacobi | 2021-10-26 |
| 11108567 | Compute digital signature authentication verify instruction | Jonathan D. Bradbury, Edward T. Malley, Christian Jacobi | 2021-08-31 |
| 11075763 | Compute digital signature authentication sign with encrypted key instruction | Jonathan D. Bradbury, Edward T. Malley, Christian Jacobi | 2021-07-27 |
| 11068541 | Vector string search instruction | Cedric Lichtenau, Jonathan D. Bradbury, Razvan Peter Figuli, Stefan Payer | 2021-07-20 |
| 11029921 | Performing processing using hardware counters in a computer system | Silvia M. Mueller, Ulrich Mayer | 2021-06-08 |
| 10996982 | Regulating hardware speculative processing around a transaction | Fadi Y. Busaba, Michael K. Gschwind, Chung-Lung K. Shum | 2021-05-04 |
| 10903988 | Unique instruction identifier that identifies common instructions across different code releases | Brenton F. Belmar, Elliott David Binder, Christopher R. Conklin | 2021-01-26 |
| 10884931 | Interprocessor memory status communication | Michael K. Gschwind, Maged M. Michael, Valentina Salapura, Chung-Lung K. Shum, Timothy J. Slegel | 2021-01-05 |
| 10782932 | Round for reround mode in a decimal floating point instruction | Michael F. Cowlishaw, Ronald M. Smith, Sr., Phil C. Yeh | 2020-09-22 |
| 10782967 | Multifunctional hexadecimal instruction form system and program product | Ronald M. Smith, Sr. | 2020-09-22 |
| 10725780 | Convert to zoned format from decimal floating point format | Steven R. Carlough, Reid T. Copeland, Charles W. Gainey, Jr., Marcel Mitran, Timothy J. Slegel | 2020-07-28 |
| 10719324 | Convert to zoned format from decimal floating point format | Steven R. Carlough, Reid T. Copeland, Charles W. Gainey, Jr., Marcel Mitran, Timothy J. Slegel | 2020-07-21 |
| 10671389 | Vector floating point test data class immediate instruction | Jonathan D. Bradbury | 2020-06-02 |
| 10671347 | Stochastic rounding floating-point multiply instruction using entropy from a register | Jonathan D. Bradbury, Steven R. Carlough, Brian R. Prasky | 2020-06-02 |
| 10656950 | Spin loop delay instruction | Fadi Y. Busaba, Christian Jacobi, Anthony Saporito, Timothy J. Slegel | 2020-05-19 |