Issued Patents All Time
Showing 25 most recent of 41 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12210908 | Routing instructions in a microprocessor | Brian W. Thompto, Tharunachalam Pindicura, Phillip G. Williams, Kent Li, Nir Segev +1 more | 2025-01-28 |
| 11327766 | Instruction dispatch routing | Eric M. Schwarz, Brian W. Thompto, Kurt A. Feiste, Dung Q. Nguyen, Susan E. Eisen | 2022-05-10 |
| 11106466 | Decoupling of conditional branches | Nicholas R. Orzol, Hung Q. Le, Dung Q. Nguyen, Eula Faye Abalos Tolentino, Brian W. Thompto | 2021-08-31 |
| 10996953 | Low latency execution of floating-point record form instructions | Brian J. D. Barrick, Maarten J. Boersma, Niels Fricke | 2021-05-04 |
| 10970079 | Parallel dispatching of multi-operation instructions in a multi-slice computer processor | Kurt A. Feiste, Paul M. Kennedy, Dung Q. Nguyen | 2021-04-06 |
| 10831501 | Managing an issue queue for fused instructions and paired instructions in a microprocessor | Hung Q. Le, Dung Q. Nguyen, Brian W. Thompto | 2020-11-10 |
| 10831498 | Managing an issue queue for fused instructions and paired instructions in a microprocessor | Hung Q. Le, Dung Q. Nguyen, Brian W. Thompto | 2020-11-10 |
| 10776122 | Prioritization protocols of conditional branch instructions | Eula Faye Abalos Tolentino, Dung Q. Nguyen, Jeffrey C. Brownscheidle, Tu-An T. Nguyen, David S. Walder | 2020-09-15 |
| 10747545 | Dual compare of least-significant-bit for dependency wake up from a fused instruction tag in a microprocessor | Hung Q. Le, Dung Q. Nguyen, Brian W. Thompto | 2020-08-18 |
| 10740104 | Tagging target branch predictors with context with index modification and late stop fetch on tag mismatch | Jentje Leenstra, Nicholas R. Orzol, Christian Zoellin, Robert Alan Philhower | 2020-08-11 |
| 10719056 | Merging status and control data in a reservation station | Brian D. Barrick, Joshua W. Bowman, Jeffrey C. Brownscheidle, Sundeep Chadha, Dhivya Jeganathan +2 more | 2020-07-21 |
| 10678547 | Low latency execution of floating-point record form instructions | Brian J. D. Barrick, Maarten J. Boersma, Niels Fricke | 2020-06-09 |
| 10671399 | Low-overhead, low-latency operand dependency tracking for instructions operating on register pairs in a processor core | Maarten J. Boersma, Sundeep Chadha, Kurt A. Feiste, Michael K. Kroener, David R. Terry | 2020-06-02 |
| 10671398 | Low-overhead, low-latency operand dependency tracking for instructions operating on register pairs in a processor core | Maarten J. Boersma, Sundeep Chadha, Kurt A. Feiste, Michael K. Kroener, David R. Terry | 2020-06-02 |
| 10635444 | Shared compare lanes for dependency wake up in a pair-based issue queue | Dung Q. Nguyen, Hung Q. Le, Brian W. Thomto | 2020-04-28 |
| 10592246 | Low latency execution of floating-point record form instructions | Brian J. D. Barrick, Maarten J. Boersma, Niels Fricke | 2020-03-17 |
| 10496412 | Parallel dispatching of multi-operation instructions in a multi-slice computer processor | Kurt A. Feiste, Paul M. Kennedy, Dung Q. Nguyen | 2019-12-03 |
| 10394565 | Managing an issue queue for fused instructions and paired instructions in a microprocessor | Hung Q. Le, Dung Q. Nguyen, Brian W. Thompto | 2019-08-27 |
| 10387147 | Managing an issue queue for fused instructions and paired instructions in a microprocessor | Hung Q. Le, Dung Q. Nguyen, Brian W. Thompto | 2019-08-20 |
| 10360036 | Cracked execution of move-to-FPSCR instructions | Brian J. D. Barrick, Maarten J. Boersma, Niels Fricke | 2019-07-23 |
| 10282207 | Multi-slice processor issue of a dependent instruction in an issue queue based on issue of a producer instruction | Brian D. Barrick, Sundeep Chadha, Jerry Y. Lu, Dung Q. Nguyen, Nasrin Sultana +2 more | 2019-05-07 |
| 10268482 | Multi-slice processor issue of a dependent instruction in an issue queue based on issue of a producer instruction | Brian D. Barrick, Sundeep Chadha, Jerry Y. Lu, Dung Q. Nguyen, Nasrin Sultana +2 more | 2019-04-23 |
| 10175985 | Mechanism for using a reservation station as a scratch register | Sundeep Chadha, Dung Q. Nguyen | 2019-01-08 |
| 10140127 | Operation of a multi-slice processor with selective producer instruction types | Brian D. Barrick, Sundeep Chadha, Maureen A. Delaney, Thao T. Doan, Rokesh Jayasundar +2 more | 2018-11-27 |
| 10127047 | Operation of a multi-slice processor with selective producer instruction types | Brian D. Barrick, Sundeep Chadha, Maureen A. Delaney, Thao T. Doan, Rokesh Jayasundar +2 more | 2018-11-13 |