Issued Patents All Time
Showing 25 most recent of 155 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12223098 | Systems and methods for dynamic control of a secure mode of operation in a processor | Debapriya Chatterjee, Christian Zoellin, Bradly G. Frey | 2025-02-11 |
| 12210908 | Routing instructions in a microprocessor | Michael J. Genden, Tharunachalam Pindicura, Phillip G. Williams, Kent Li, Nir Segev +1 more | 2025-01-28 |
| 12204902 | Routing instruction results to a register block of a subdivided register file based on register block utilization rate | Kurt A. Feiste, Susan E. Eisen, Salma Ayub, Dung Q. Nguyen | 2025-01-21 |
| 12061910 | Dispatching multiply and accumulate operations based on accumulator register index number | Jentje Leenstra, Andreas Wagner, Jose E. Moreira | 2024-08-13 |
| 12061909 | Parallel slice processor having a recirculating load-store queue for fast deallocation of issue queue entries | Salma Ayub, Sundeep Chadha, Robert A. Cordes, David A. Hrusecky, Hung Q. Le +1 more | 2024-08-13 |
| 12008149 | Method and system for on demand control of hardware support for software pointer authentification in a computing system | Debapriya Chatterjee, Jose E. Moreira | 2024-06-11 |
| 11995445 | Assignment of microprocessor register tags at issue time | Steven J. Battle, Jentje Leenstra, Brian D. Barrick, Dung Q. Nguyen | 2024-05-28 |
| 11989136 | Methods and systems for translating virtual addresses in a virtual memory based system | Mohit Karve | 2024-05-21 |
| 11900116 | Loosely-coupled slice target file data | Dung Q. Nguyen, Jose E. Moreira, Jessica Hui-Chun Tseng, Pratap C. Pattnaik, Kattamuri Ekanadham +1 more | 2024-02-13 |
| 11886883 | Dependency skipping in a load-compare-jump sequence of instructions by incorporating compare functionality into the jump instruction and auto-finishing the compare instruction | Nicholas R. Orzol, Mehul Patel, Dung Q. Nguyen, Brian D. Barrick, Richard J. Eickemeyer +3 more | 2024-01-30 |
| 11868773 | Inferring future value for speculative branch resolution in a microprocessor | Steven J. Battle, Brian D. Barrick, Dung Q. Nguyen, Richard J. Eickemeyer, John B. Griswell, Jr. +2 more | 2024-01-09 |
| 11797713 | Systems and methods for dynamic control of a secure mode of operation in a processor | Debapriya Chatterjee, Christian Zoellin, Bradly G. Frey | 2023-10-24 |
| 11755320 | Compute array of a processor with mixed-precision numerical linear algebra support | Jose E. Moreira, Brett Olsson, Silvia M. Mueller, Andreas Wagner | 2023-09-12 |
| 11755325 | Instruction handling for accumulation of register results in a microprocessor | Maarten J. Boersma, Andreas Wagner, Jose E. Moreira, Hung Q. Le, Silvia M. Mueller +1 more | 2023-09-12 |
| 11748104 | Microprocessor that fuses load and compare instructions | Bryan Lloyd, David A. Hrusecky, Sundeep Chadha, Dung Q. Nguyen, Christian Zoellin +2 more | 2023-09-05 |
| 11734010 | Parallel slice processor having a recirculating load-store queue for fast deallocation of issue queue entries | Salma Ayub, Sundeep Chadha, Robert A. Cordes, David A. Hrusecky, Hung Q. Le +1 more | 2023-08-22 |
| 11709676 | Inferring future value for speculative branch resolution | Steven J. Battle, Brian D. Barrick, Dung Q. Nguyen, Richard J. Eickemeyer, John B. Griswell, Jr. +2 more | 2023-07-25 |
| 11663013 | Dependency skipping execution | Nicholas R. Orzol, Mehul Patel, Dung Q. Nguyen, Brian D. Barrick, Richard J. Eickemeyer +3 more | 2023-05-30 |
| 11636045 | Translating virtual addresses in a virtual memory based system | Mohit Karve | 2023-04-25 |
| 11561794 | Evicting and restoring information using a single port of a logical register mapper and history buffer in a microprocessor comprising multiple main register file entries mapped to one accumulator register file entry | Steven J. Battle, Dung Q. Nguyen, Cliff Kucharski, Susan E. Eisen, Salma Ayub | 2023-01-24 |
| 11561798 | On-the-fly adjustment of issue-write back latency to avoid write back collisions using a result buffer | Brian D. Barrick, Maarten J. Boersma, Niels Fricke, Dung Q. Nguyen, Andreas Wagner | 2023-01-24 |
| 11537402 | Execution elision of intermediate instruction by processor | Brian D. Barrick, Bryan Lloyd, Dung Q. Nguyen, Edmund J. Gieske, John B. Griswell, Jr. | 2022-12-27 |
| 11531548 | Fast perfect issue of dependent instructions in a distributed issue queue system | Brian D. Barrick, Dung Q. Nguyen, Tu-An T. Nguyen, Salma Ayub | 2022-12-20 |
| 11520585 | Prefetch store preallocation in an effective address-based cache directory | Bryan Lloyd, George W. Rohrbaugh, III, Mohit Karve, Vivek Britto | 2022-12-06 |
| 11500642 | Assignment of microprocessor register tags at issue time | Steven J. Battle, Jentje Leenstra, Brian D. Barrick, Dung Q. Nguyen | 2022-11-15 |