| 12411688 |
Gather buffer management for unaligned and gather load operations |
Kimberly M. Fernsler, David A. Hrusecky, David Campbell |
2025-09-09 |
|
| 11775337 |
Prioritization of threads in a simultaneous multithreading processor core |
Guy L. Guthrie, Susan E. Eisen, Dhivya Jeganathan, Luke Murray |
2023-10-03 |
$6,984,000 |
| 11755324 |
Gather buffer management for unaligned and gather load operations |
Kimberly M. Fernsler, David A. Hrusecky, David Campbell |
2023-09-12 |
$5,734,000 |
| 11748104 |
Microprocessor that fuses load and compare instructions |
David A. Hrusecky, Sundeep Chadha, Dung Q. Nguyen, Christian Zoellin, Brian W. Thompto +2 more |
2023-09-05 |
$6,576,000 |
| 11687337 |
Processor overriding of a false load-hit-store detection |
Brian Chen, Kimberly M. Fernsler |
2023-06-27 |
$4,778,000 |
| 11650926 |
Virtual cache synonym detection using alias tags |
David Campbell |
2023-05-16 |
$5,363,000 |
| 11645208 |
Translation bandwidth optimized prefetching strategy through multiple translation lookaside buffers |
David Campbell, George W. Rohrbaugh, III, Vivek Britto, Mohit Karve |
2023-05-09 |
$3,203,000 |
| 11537519 |
Marking in-flight requests affected by translation entry invalidation in a data processing system |
Derek E. Williams, Guy L. Guthrie, Hugh Shen, David Campbell, Samuel David Kirchhoff +1 more |
2022-12-27 |
$9,721,000 |
| 11537402 |
Execution elision of intermediate instruction by processor |
Brian D. Barrick, Dung Q. Nguyen, Brian W. Thompto, Edmund J. Gieske, John B. Griswell, Jr. |
2022-12-27 |
$9,721,000 |
| 11520585 |
Prefetch store preallocation in an effective address-based cache directory |
Brian W. Thompto, George W. Rohrbaugh, III, Mohit Karve, Vivek Britto |
2022-12-06 |
$6,201,000 |
| 11520704 |
Writing store data of multiple store operations into a cache line in a single cycle |
Robert A. Cordes |
2022-12-06 |
$6,201,000 |
| 11500774 |
Virtual cache tag renaming for synonym handling |
David Campbell |
2022-11-15 |
$5,426,000 |
| 11379241 |
Handling oversize store to load forwarding in a processor |
Brian Chen, Kimberly M. Fernsler, Robert A. Cordes, David A. Hrusecky |
2022-07-05 |
$7,280,000 |
| 11321088 |
Tracking load and store instructions and addresses in an out-of-order processor |
Samuel David Kirchhoff, Brian Chen, Kimberly M. Fernsler, David A. Hrusecky |
2022-05-03 |
$6,057,000 |
| 11314510 |
Tracking load and store instructions and addresses in an out-of-order processor |
Samuel David Kirchhoff, Brian Chen, Kimberly M. Fernsler, David A. Hrusecky |
2022-04-26 |
$5,083,000 |
| 11263151 |
Dynamic translation lookaside buffer (TLB) invalidation using virtually tagged cache for load/store operations |
David Campbell, David A. Hrusecky, Kimberly M. Fernsler, Jeffrey A. Stuecheli, Guy L. Guthrie +4 more |
2022-03-01 |
$6,542,000 |
| 11249757 |
Handling and fusing load instructions in a processor |
Brian W. Thompto, Dung Q. Nguyen, Sheldon B. Levenstein, Brian D. Barrick, Christian Zoellin |
2022-02-15 |
$5,512,000 |
| 11243773 |
Area and power efficient mechanism to wakeup store-dependent loads according to store drain merges |
David Campbell, Brian Chen, Robert A. Cordes |
2022-02-08 |
$4,353,000 |
| 11175924 |
Load-store unit with partitioned reorder queues with single cam port |
Christopher Gonzalez, Balaram Sinharoy |
2021-11-16 |
$1,912,000 |
| 11175925 |
Load-store unit with partitioned reorder queues with single cam port |
Christopher Gonzalez, Balaram Sinharoy |
2021-11-16 |
$1,912,000 |
| 11119945 |
Context tracking for multiple virtualization layers in a virtually tagged cache |
Jake Truelove, David Campbell |
2021-09-14 |
$2,674,000 |
| 11086787 |
Virtual cache synonym detection using alias tags |
David Campbell |
2021-08-10 |
$4,960,000 |
| 11061810 |
Virtual cache mechanism for program break point register exception handling |
David Campbell, Dwain A. Hicks, David A. Hrusecky |
2021-07-13 |
$4,436,000 |
| 10977175 |
Virtual cache tag renaming for synonym handling |
David Campbell |
2021-04-13 |
$3,936,000 |
| 10977047 |
Hazard detection of out-of-order execution of load and store instructions in processors without using real addresses |
Balaram Sinharoy, Shih-Hsiung S. Tung |
2021-04-13 |
$3,936,000 |
