JJ

John B. Griswell, Jr.

IBM: 21 patents #5,175 of 70,183Top 8%
Overall (All Time): #203,345 of 4,157,543Top 5%
21
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11886883 Dependency skipping in a load-compare-jump sequence of instructions by incorporating compare functionality into the jump instruction and auto-finishing the compare instruction Nicholas R. Orzol, Mehul Patel, Dung Q. Nguyen, Brian D. Barrick, Richard J. Eickemeyer +3 more 2024-01-30
11868773 Inferring future value for speculative branch resolution in a microprocessor Steven J. Battle, Brian D. Barrick, Dung Q. Nguyen, Richard J. Eickemeyer, Balaram Sinharoy +2 more 2024-01-09
11847458 Thread priorities using misprediction rate and speculative depth Richard J. Eickemeyer, Ehsan Fatehi, Naga P. Gorti 2023-12-19
11709676 Inferring future value for speculative branch resolution Steven J. Battle, Brian D. Barrick, Dung Q. Nguyen, Richard J. Eickemeyer, Balaram Sinharoy +2 more 2023-07-25
11663013 Dependency skipping execution Nicholas R. Orzol, Mehul Patel, Dung Q. Nguyen, Brian D. Barrick, Richard J. Eickemeyer +3 more 2023-05-30
11537402 Execution elision of intermediate instruction by processor Brian D. Barrick, Bryan Lloyd, Dung Q. Nguyen, Brian W. Thompto, Edmund J. Gieske 2022-12-27
11520591 Flushing of instructions based upon a finish ratio and/or moving a flush point in a processor Ehsan Fatehi, Richard J. Eickemeyer 2022-12-06
11226817 Prefetching workloads with dependent pointers Mohit Karve, Donald R. Stence, Brian W. Thompto 2022-01-18
11182164 Pairing issue queues for complex instructions and instruction fusion Brian D. Barrick, Dung Q. Nguyen, Brian W. Thompto 2021-11-23
11080060 Preventing operand store compare conflicts using conflict address data tables Ehsan Fatehi, Brian W. Thompto 2021-08-03
10915446 Prefetch confidence and phase prediction for improving prefetch performance in bandwidth constrained scenarios Richard J. Eickemeyer, Mohit Karve 2021-02-09
10209995 Processor core including pre-issue load-hit-store (LHS) hazard prediction to reduce rejection of load instructions Sundeep Chadha, Richard J. Eickemeyer, Dung Q. Nguyen 2019-02-19
9465744 Data prefetch ramp implemenation based on memory utilization Jason N. Dale, Miles Robert Dooley, Richard J. Eickemeyer, Francis Patrick O'Connell, Jeffrey A. Stuecheli 2016-10-11
8135942 System and method for double-issue instructions using a dependency matrix and a side issue queue Christopher M. Abernathy, Mary D. Brown, Todd A. Venton 2012-03-13
7904661 Data stream prefetching in a microprocessor Eric Jason Fluhr, Bradly G. Frey, Hung Q. Le, Cathy May, Francis Patrick O'Connell +2 more 2011-03-08
7716427 Store stream prefetching in a microprocessor Hung Q. Le, Francis Patrick O'Connell, William J. Starke, Jeffrey A. Stuecheli, Albert Thomas Williams 2010-05-11
7689775 System using stream prefetching history to improve data prefetching performance Francis Patrick O'Connell 2010-03-30
7516279 Method using stream prefetching history to improve data prefetching performance. Francis Patrick O'Connell 2009-04-07
7392366 Adaptive fetch gating in multithreaded processors, fetch control and method of controlling fetches Pradip Bose, Alper Buyuktosunoglu, Richard J. Eickemeyer, Lee Evan Eisen, Philip G. Emma +4 more 2008-06-24
7380066 Store stream prefetching in a microprocessor Hung Q. Le, Francis Patrick O'Connell, William J. Starke, Jeffrey A. Stuecheli, Albert Thomas Williams 2008-05-27
7350029 Data stream prefetching in a microprocessor Eric Jason Fluhr, Bradly G. Frey, Hung Q. Le, Cathy May, Francis Patrick O'Connell +2 more 2008-03-25