LE

Lee Evan Eisen

IBM: 45 patents #1,982 of 70,183Top 3%
NV NVIDIA: 10 patents #721 of 7,811Top 10%
Motorola: 2 patents #4,475 of 12,470Top 40%
Overall (All Time): #45,996 of 4,157,543Top 2%
55
Patents All Time

Issued Patents All Time

Showing 25 most recent of 55 patents

Patent #TitleCo-InventorsDate
11379228 Microprocessor including an efficiency logic unit Avraham Ayzenfeld, Brian W. Curran, Christian Jacobi 2022-07-05
11080054 Data processing apparatus and method for generating a status flag using predicate indicators Neil Burgess, Gary Alan Gorman, Daniel Arulraj 2021-08-03
11074214 Data processing Jelena Milanovic, Nigel John Stephens 2021-07-27
11055096 Checkpointing of architectural state for in order processing circuitry Neil Burgess 2021-07-06
11036503 Predicate indicator generation for vector processing operations Gary Alan Gorman, Neil Burgess, Daniel Arulraj 2021-06-15
11030121 Apparatus and method for comparing regions associated with first and second bounded pointers Daniel Arulraj, Graeme Peter Barnes 2021-06-08
10983800 Reconfigurable processor with load-store slices supporting reorder and controlling access to cache slices Hung Q. Le, Jentje Leenstra, Jose E. Moreira, Bruce Joseph Ronchetti, Brian W. Thompto +1 more 2021-04-20
10635445 Handling modifications to permitted program counter ranges in a data processing apparatus Rémi Marius Teyssier, Albin Pierrick Tonnerre, Cedric Denis Robert Airaud, Luca NASSI, Guillaume Bolbenes +2 more 2020-04-28
10628157 Early predicate look-up Alejandro Rico Carro 2020-04-21
10572259 Hints in a data processing apparatus Jesse Garrett Beu, Alejandro Rico Carro, Michael Filippo 2020-02-25
10514911 Structure for microprocessor including arithmetic logic units and an efficiency logic unit Avraham Ayzenfeld, Brian W. Curran, Christian Jacobi 2019-12-24
10503503 Generating design structure for microprocessor with arithmetic logic units and an efficiency logic unit Avraham Ayzenfeld, Brian W. Curran, Christian Jacobi 2019-12-10
10416963 Bounds checking Daniel Arulraj, Graeme Peter Barnes, Gary Alan Gorman 2019-09-17
10366741 Bit processing Neil Burgess, Nigel John Stephens, Jaime Ferragut Martinez-Vara De Rey 2019-07-30
10157064 Processing of multiple instruction streams in a parallel slice processor Hung Q. Le, Jentje Leenstra, Jose E. Moreira, Bruce Joseph Ronchetti, Brian W. Thompto +1 more 2018-12-18
10108426 Dynamic issue masks for processor hang prevention Gregory W. Alexander, Steven R. Carlough, David A. Schroter 2018-10-23
10102002 Dynamic issue masks for processor hang prevention Gregory W. Alexander, Steven R. Carlough, David A. Schroter 2018-10-16
10083039 Reconfigurable processor with load-store slices supporting reorder and controlling access to cache slices Hung Q. Le, Jentje Leenstra, Jose E. Moreira, Bruce Joseph Ronchetti, Brian W. Thompto +1 more 2018-09-25
9996354 Instruction stream tracing of multi-threaded processors Lisa C. Heller, Michael T. Huffer, Eric M. Schwarz 2018-06-12
9977678 Reconfigurable parallel execution and load-store slice processor Hung Q. Le, Jentje Leenstra, Jose E. Moreira, Bruce Joseph Ronchetti, Brian W. Thompto +1 more 2018-05-22
9971602 Reconfigurable processing method with modes controlling the partitioning of clusters and cache slices Hung Q. Le, Jentje Leenstra, Jose E. Moreira, Bruce Joseph Ronchetti, Brian W. Thompto +1 more 2018-05-15
9880847 Register file mapping Gregory W. Alexander, Brian D. Barrick, David A. Schroter 2018-01-30
9690586 Processing of multiple instruction streams in a parallel slice processor Hung Q. Le, Jentje Leenstra, Jose E. Moreira, Bruce Joseph Ronchetti, Brian W. Thompto +1 more 2017-06-27
9690585 Parallel slice processor with dynamic instruction stream mapping Hung Q. Le, Jentje Leenstra, Jose E. Moreira, Bruce Joseph Ronchetti, Brian W. Thompto +1 more 2017-06-27
9672043 Processing of multiple instruction streams in a parallel slice processor Hung Q. Le, Jentje Leenstra, Jose E. Moreira, Bruce Joseph Ronchetti, Brian W. Thompto +1 more 2017-06-06