| 11537522 |
Determining a tag value for use in a tag-guarded memory |
Xiaoyang Shen, Yohann Rabefarihy, Cedric Denis Robert Airaud |
2022-12-27 |
| 11157277 |
Data processing apparatus with respective banked registers for exception levels |
Cedric Denis Robert Airaud, Albin Pierrick Tonnerre, Luca NASSI |
2021-10-26 |
| 11132202 |
Cache control circuitry and methods |
Luca NASSI, Cedric Denis Robert Airaud, Albin Pierrick Tonnerre, François Donati, Christophe Laurent Carbonne +1 more |
2021-09-28 |
| 10977044 |
Executing branch instructions following a speculation barrier instruction |
Luca NASSI, Albin Pierrick Tonnerre, François Donati |
2021-04-13 |
| 10915327 |
Apparatus and method of dispatching instructions for execution clusters based on dependencies |
Luca NASSI, François Donati, Damian Maiorano |
2021-02-09 |
| 10635445 |
Handling modifications to permitted program counter ranges in a data processing apparatus |
Albin Pierrick Tonnerre, Cedric Denis Robert Airaud, Luca NASSI, Guillaume Bolbenes, François Donati +2 more |
2020-04-28 |
| 10558462 |
Apparatus and method for storing source operands for operations |
Luca NASSI, Cedric Denis Robert Airaud, Albin Pierrick Tonnerre |
2020-02-11 |
| 9513925 |
Marking long latency instruction as branch in pending instruction table and handle as mis-predicted branch upon interrupting event to return to checkpointed state |
Nicolas Chaussade, Florent Begon, Melanie Emanuelle Lucie Teyssier, Jocelyn Francois Orion Jaubert |
2016-12-06 |
| 8782378 |
Dynamic instruction splitting |
Nicolas Chaussade |
2014-07-15 |
| 8578139 |
Checkpointing long latency instruction as fake branch in branch prediction mechanism |
Nicolas Chaussade, Florent Begon, Melanie Emanuelle Lucie Teyssier, Jocelyn Francois Orion Jaubert |
2013-11-05 |
| 8352794 |
Control of clock gating |
Florent Begon, Jocelyn Francois Orion Jaubert, Cedric Denis Robert Airaud |
2013-01-08 |