JJ

Jocelyn Francois Orion Jaubert

NV NVIDIA: 13 patents #512 of 7,811Top 7%
Overall (All Time): #375,562 of 4,157,543Top 10%
13
Patents All Time

Issued Patents All Time

Showing 1–13 of 13 patents

Patent #TitleCo-InventorsDate
11531547 Data processing Damian Maiorano, Luca NASSI, Cedric Denis Robert Airaud, Christophe Laurent Carbonne, Pasquale Ranone 2022-12-20
10902113 Data processing Guillaume Schon, Frederic Jean Denis Arsanto, Carlo Dario Fanara 2021-01-26
10572262 Register mapping of register specifiers to registers depending on a key value used for mapping at least two of the register specifiers Frederic Jean Denis Arsanto, Guillaume Schon, Carlo Dario Fanara 2020-02-25
10540299 Resetting operating state holding element Carlo Dario Fanara, Frederic Jean Denis Arsanto, Guillaume Schon 2020-01-21
10445500 Reset attack detection Guillaume Schon, Frederic Jean Denis Arsanto, Carlo Dario Fanara 2019-10-15
9513925 Marking long latency instruction as branch in pending instruction table and handle as mis-predicted branch upon interrupting event to return to checkpointed state Nicolas Chaussade, Florent Begon, Melanie Emanuelle Lucie Teyssier, Rémi Marius Teyssier 2016-12-06
9361112 Return address prediction Clément Marc Demongeot, Louis-Marie Vincent Mouton, Frederic Claude Marie Piry, Albin Pierick Tonnerre 2016-06-07
9323536 Identification of missing call and return instructions for management of a return address stack Clément Marc Demongeot, Louis-Marie Vincent Mouton 2016-04-26
9189432 Apparatus and method for predicting target storage unit Melanie Emanuelle Lucie Teyssier, Florent Begon, Nicolas Jean Phillippe Huot 2015-11-17
8578139 Checkpointing long latency instruction as fake branch in branch prediction mechanism Nicolas Chaussade, Florent Begon, Melanie Emanuelle Lucie Teyssier, Rémi Marius Teyssier 2013-11-05
8458532 Error handling mechanism for a tag memory within coherency control circuitry Florent Begon, Melanie Emanuelle Lucie Teyssier 2013-06-04
8352794 Control of clock gating Rémi Marius Teyssier, Florent Begon, Cedric Denis Robert Airaud 2013-01-08
7650483 Execution of instructions within a data processing apparatus having a plurality of processing units Elodie Charra, Frederic Claude Marie Piry, Richard Roy Grisenthwaite, Melanie Emanuelle Lucie Vincent, Norbert Bernard Eugene Lataille +1 more 2010-01-19