Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9639484 | Provision of access control data within a data processing system | Simon John Craske, Nicolas Jean Phillippe Huot, Gilles Eric Grandou | 2017-05-02 |
| 9513925 | Marking long latency instruction as branch in pending instruction table and handle as mis-predicted branch upon interrupting event to return to checkpointed state | Nicolas Chaussade, Florent Begon, Rémi Marius Teyssier, Jocelyn Francois Orion Jaubert | 2016-12-06 |
| 9361111 | Tracking speculative execution of instructions for a register renaming data store | Luca Scalabrino, Cedric Denis Robert Airaud, Guillaume Schon | 2016-06-07 |
| 9223701 | Data processing apparatus and method for performing load-exclusive and store-exclusive operations | Frederic Claude Marie Piry, Philippe Jean-Pierre Raphalen, Albin Pierick Tonnerre | 2015-12-29 |
| 9189432 | Apparatus and method for predicting target storage unit | Florent Begon, Jocelyn Francois Orion Jaubert, Nicolas Jean Phillippe Huot | 2015-11-17 |
| 9075621 | Error recovery upon reaching oldest instruction marked with error or upon timed expiration by flushing instructions in pipeline pending queue and restarting execution | Guillaume Schon, Frederic Claude Marie Piry, Luca Scalabrino, David Michael Bull | 2015-07-07 |
| 9052909 | Recovering from exceptions and timing errors | Frederic Claude Marie Piry, Luca Scalabrino, Guillaume Schon | 2015-06-09 |
| 9047092 | Resource management within a load store unit | Philippe Luc, Albin Pierick Tonnerre | 2015-06-02 |
| 8578139 | Checkpointing long latency instruction as fake branch in branch prediction mechanism | Nicolas Chaussade, Florent Begon, Rémi Marius Teyssier, Jocelyn Francois Orion Jaubert | 2013-11-05 |
| 8458532 | Error handling mechanism for a tag memory within coherency control circuitry | Jocelyn Francois Orion Jaubert, Florent Begon | 2013-06-04 |