Issued Patents All Time
Showing 25 most recent of 123 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12386755 | Data processing apparatus and method for address translation | Carlos Garcia-Tobin, Bruce James Mathewson, Matthew Evans | 2025-08-12 |
| 12197916 | Processing instructions selected from a first instruction set in a first processing mode and instructions selected from a second different instruction set in a second processing mode | Nigel John Stephens, David Hennah Mansell, Matthew Evans, Jelena Milanovic | 2025-01-14 |
| 11989134 | Apparatus and method | Yuval Elad, Jason Parker, Simon John Craske, Alexander Donald Charles Chadwick | 2024-05-21 |
| 11762566 | Programmable mapping of guard tag storage locations | Graeme Peter Barnes | 2023-09-19 |
| 11669467 | Memory access instructions | Jason Parker | 2023-06-06 |
| 11663034 | Permitting unaborted processing of transaction after exception mask update instruction | Matthew James Horsnell, Grigorios Magklis, Stephan Diestelhorst | 2023-05-30 |
| 11636048 | Handling guard tag loss | Graeme Peter Barnes | 2023-04-25 |
| 11615032 | Address translation data invalidation | Matthew James Horsnell, Grigorios Magklis | 2023-03-28 |
| 11579873 | Handling load-exclusive instructions in apparatus having support for transactional memory | Matthew James Horsnell, Grigorios Magklis, Nathan Yong Seng Chong | 2023-02-14 |
| 11573907 | Controlling memory accesses using a tag-guarded memory access operation | Ruben Borisovich Ayrapetyan, Graeme Peter Barnes | 2023-02-07 |
| 11461104 | Deferred system error exception handling in a data processing apparatus | Michael John Williams, Simon John Craske | 2022-10-04 |
| 11461243 | Speculative cache storage region | — | 2022-10-04 |
| 11429532 | Write operations to non-volatile memory | Ali Ghassan Saidi | 2022-08-30 |
| 11379233 | Apparatus and data processing method for transactional memory | Matthew James Horsnell | 2022-07-05 |
| 11314658 | Apparatus and method including an ownership table for indicating owner processes for blocks of physical addresses of a memory | Jason Parker, Andrew Christopher Rose | 2022-04-26 |
| 11307856 | Branch target variant of branch-with-link instruction | Graeme Peter Barnes | 2022-04-19 |
| 11068268 | Data structure processing | Nigel John Stephens, David Hennah Mansell, Matthew Evans | 2021-07-20 |
| 11030344 | Apparatus and method for controlling use of bounded pointers | Graeme Peter Barnes | 2021-06-08 |
| 10949292 | Memory interface having data signal path and tag signal path | Bruce James Mathewson, Phanindra Kumar Mannava, Michael Andrew Campbell, Alexander Alfred Hornung, Alex James Waugh +1 more | 2021-03-16 |
| 10936504 | Apparatus and method for address translation and control of whether an access request is rejected based on an ownership table indicating an owner process for a block of physical addresses | Jason Parker, Andrew Christopher Rose | 2021-03-02 |
| 10866805 | Speculation barrier instruction | Giacomo Gabrielli, Matthew James Horsnell | 2020-12-15 |
| 10838877 | Protected exception handling | Jason Parker, Andrew Christopher Rose, Matthew Evans | 2020-11-17 |
| 10802729 | Apparatus and method for sharing pages including enforcing ownership rights independently of privilege level | Jason Parker, Andrew Christopher Rose | 2020-10-13 |
| 10795675 | Determine whether to fuse move prefix instruction and immediately following instruction independently of detecting identical destination registers | Nigel John Stephens | 2020-10-06 |
| 10776120 | Apparatus and method to generate trace data in response to transactional execution | Michael John Williams, John Michael Horley, Stephan Diestelhorst | 2020-09-15 |