BM

Bruce James Mathewson

NV NVIDIA: 54 patents #57 of 7,811Top 1%
Overall (All Time): #47,101 of 4,157,543Top 2%
54
Patents All Time

Issued Patents All Time

Showing 25 most recent of 54 patents

Patent #TitleCo-InventorsDate
12386755 Data processing apparatus and method for address translation Carlos Garcia-Tobin, Matthew Evans, Richard Roy Grisenthwaite 2025-08-12
11599467 Cache for storing coherent and non-coherent data Jamshed Jalal, Tushar P. Ringe, Sean James Salisbury, Antony John Harris 2023-03-07
11537543 Technique for handling protocol conversion Ashok Kumar Tummala, Jamshed Jalal, Antony John Harris, Jeffrey Carl Defilippi, Anitha Kona 2022-12-27
11314675 Interface circuitry for exchanging information with master, home, and slave nodes using different data transfer protocols Guanghui Geng, Andrew David Tune, Daniel Sara, Phanindra Kumar Mannava, Jamshed Jalal 2022-04-26
11314648 Data processing Michael Filippo, Jamshed Jalal, Kias Magnus Bruce, Alex James Waugh, Geoffray Matthieu Lacourba +2 more 2022-04-26
11269773 Exclusivity in circuitry having a home node providing coherency control Phanindra Kumar Mannava, Jamshed Jalal, Klas Magnus Bruce, Andrew John Turner 2022-03-08
11263137 Core-to-core cache stashing and target discovery Jose Alberto Joao, Tiago Rogerio Muck, Joshua Randall, Alejandro Rico Carro 2022-03-01
11256623 Cache content management Phanindra Kumar Mannava, Jamshed Jalal, Klas Magnus Bruce, Michael Filippo, Paul Gilbert Meyer +2 more 2022-02-22
11188377 Writing zero data Jamshed Jalal, Mark David Werkheiser, Phanindra Kumar Mannava 2021-11-30
11159636 Forwarding responses to snoop requests Phanindra Kumar Mannava, Jamshed Jalal, Klas Magnus Bruce 2021-10-26
11144458 Apparatus and method for performing cache maintenance over a virtual page Jason Parker, Matthew Evans 2021-10-12
11055250 Non-forwardable transfers Phanindra Kumar Mannava, Klas Magnus Bruce, Damien Guillaume Pierre Payet, Jamshed Jalal, Alex James Waugh 2021-07-06
10970225 Apparatus and method for handling cache maintenance operations Phanindra Kumar Mannava, Jamshed Jalal 2021-04-06
10963409 Interconnect circuitry and a method of operating such interconnect circuitry Rowan Nigel Naylor, Phanindra Kumar Mannava 2021-03-30
10949292 Memory interface having data signal path and tag signal path Phanindra Kumar Mannava, Michael Andrew Campbell, Alexander Alfred Hornung, Alex James Waugh, Klas Magnus Bruce +1 more 2021-03-16
10917198 Transfer protocol in a data processing network Phanindra Kumar Mannava, Jamshed Jalal, Tushar P. Ringe 2021-02-09
10817336 Apparatus and method to schedule time-sensitive tasks Michael Andrew Campbell, Fergus W. MacGarry 2020-10-27
10795820 Read transaction tracker lifetimes in a coherent interconnect system Phanindra Kumar Mannava, Jamshed Jalal, Tushar P. Ringe 2020-10-06
10783080 Cache maintenance operations in a data processing system Phanindra Kumar Mannava, Jamshed Jalal, Paul Gilbert Meyer 2020-09-22
10732854 Runtime configuration of a data processing system Carlos Garcia-Tobin, Phanindra Kumar Mannava, Thanunathan Rangarajan 2020-08-04
10664399 Filtering coherency protocol transactions Hakan Persson, Ian Rudolf Bratt, Andrew Brookfield Swaine 2020-05-26
10613996 Separating completion and data responses for higher read throughput and lower link utilization in a data processing network Phanindra Kumar Mannava, Jamshed Jalal, Tushar P. Ringe, Klas Magnus Bruce 2020-04-07
10579526 Responding to snoop requests Phanindra Kumar Mannava, Jamshed Jalal, Klas Magnus Bruce 2020-03-03
10489323 Data processing system for a home node to authorize a master to bypass the home node to directly send data to a slave Guanghui Geng, Andrew David Tune, Daniel Sara, Phanindra Kumar Mannava, Jamshed Jalal 2019-11-26
10324858 Access control Phanindra Kumar Mannava, Matthew Evans, Paul Gilbert Meyer, Andrew Brookfield Swaine 2019-06-18