Issued Patents All Time
Showing 25 most recent of 60 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12073222 | Instruction ordering | Vaibhav Gogte, Wei Wang, Peter M. Chen, Satish Narayanasamy, Thomas Friedrich Wenisch | 2024-08-27 |
| 12038846 | Page table structure | Andreas Lars Sandberg | 2024-07-16 |
| 11803228 | Multiple heterogeneous energy stores | Andreas Hansson, Ashley John Crawford, James Edward Myers | 2023-10-31 |
| 11775297 | Transaction nesting depth testing instruction | Grigorios Magklis, Matthew James Horsnell | 2023-10-03 |
| 11663034 | Permitting unaborted processing of transaction after exception mask update instruction | Matthew James Horsnell, Grigorios Magklis, Richard Roy Grisenthwaite | 2023-05-30 |
| 11657003 | Apparatus and method | Ilias Vougioukas, Nikos NIKOLERIS, Andreas Lars Sandberg | 2023-05-23 |
| 11604727 | Apparatus and methods to prolong lifetime of memories | Ireneus Johannes de Jong, Andres Amaya Garcia | 2023-03-14 |
| 11481290 | Exception handling in transactions | Matthew James Horsnell, Grigorios Magklis | 2022-10-25 |
| 11422808 | Transactional compare-and-discard instruction | Matthew James Horsnell, Grigorios Magklis | 2022-08-23 |
| 11347539 | Checking lock variables for transactions in a system with transactional memory support | Matthew James Horsnell | 2022-05-31 |
| 11263133 | Cache control in presence of speculative read operations | Andreas Lars Sandberg, Nikos NIKOLERIS, Ian Michael Caulfield, Peter Richard Greenhalgh, Frederic Claude Marie Piry +1 more | 2022-03-01 |
| 11137919 | Initialisation of a storage device | Wei Wang, Wendy Arnott Elsasser | 2021-10-05 |
| 10956166 | Instruction ordering | Vaibhav Gogte, Wei Wang, Peter M. Chen, Satish Narayanasamy, Thomas Friedrich Wenisch | 2021-03-23 |
| 10956163 | Processor support for hardware transactional memory | Jaewoong Chung, David S. Christie, Michael P. Hohmuth, Martin T. Pohlack, Luke Yen | 2021-03-23 |
| 10929308 | Performing maintenance operations | Andreas Lars Sandberg, Nikos NIKOLERIS, Prakash S. Ramrakhyani | 2021-02-23 |
| 10908944 | Apparatus with shared transactional processing resource, and data processing method | Matthew James Horsnell, Guy Larri | 2021-02-02 |
| 10866890 | Method and apparatus for implementing lock-free data structures | Wei Wang | 2020-12-15 |
| 10866904 | Data storage for multiple data types | Prakash S. Ramrakhyani, Andreas Lars Sandberg, Nikos NIKOLERIS | 2020-12-15 |
| 10853262 | Memory address translation using stored key entries | Nikos NIKOLERIS, Andreas Lars Sandberg, Prakash S. Ramrakhyani | 2020-12-01 |
| 10838730 | Saving and restoring branch prediction state | Ilias Vougioukas, Andreas Lars Sandberg, Matthew James Horsnell | 2020-11-17 |
| 10810039 | Monitoring utilization of transactional processing resource | Matthew James Horsnell | 2020-10-20 |
| 10795815 | Method and apparatus for maintaining data coherence in a non-uniform compute device | Jonathan Curtis Beard, Wendy Arnott Elsasser | 2020-10-06 |
| 10776120 | Apparatus and method to generate trace data in response to transactional execution | Michael John Williams, John Michael Horley, Richard Roy Grisenthwaite | 2020-09-15 |
| 10761988 | Methods and apparatus of cache access to a data array with locality-dependent latency characteristics | Radhika Sanjeev Jagtap, Nikos NIKOLERIS, Andreas Lars Sandberg | 2020-09-01 |
| 10719236 | Memory controller with non-volatile buffer for persistent memory operations | Andreas Hansson, Wei Wang, Irenéus Johannes de Jong | 2020-07-21 |