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USPTO Patent Rankings Data through Dec 31, 2025
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Nigel John Stephens — 35 Patents

NVIDIA: 34 patents #138 of 7,811Top 2%
Apple: 1 patents #12,397 of 18,612Top 70%
Cambridge, GB: #72 of 4,587 inventorsTop 2%
Overall (All Time): #96,288 of 4,157,543Top 3%
35 Patents All Time
Nigel John Stephens has been granted 35 US patents while listed as an inventor at NVIDIA. The first was granted in 2015 and the most recent in December 2025. Nigel John Stephens ranks #96,288 of 4,157,543 US inventors in our database (top 2.3%). Patent records list Nigel John Stephens in Cambridge, GB.

Issued Patents All Time

Showing 1–25 of 35 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12488225 Modular open system architecture for common intelligence picture generation Adam Estrada, Dave Rabrun, Matthew Berra, Kevin Naquin, Michael D. Ludlam +2 more 2025-12-02
12288071 Register addressing information for data transfer instruction Jelena Milanovic, David Hennah Mansell 2025-04-29
12197916 Processing instructions selected from a first instruction set in a first processing mode and instructions selected from a second different instruction set in a second processing mode David Hennah Mansell, Richard Roy Grisenthwaite, Matthew Evans, Jelena Milanovic 2025-01-14
12061906 Apparatus and method for performing a splice of vectors based on location and length data Jacob Eapen, Mbou Eyole 2024-08-13 $79,236,000
11422807 Testing bit values inside vector elements Grigorios Magklis 2022-08-23
11354126 Data processing Michael John Williams 2022-06-07
11327752 Element by vector operations in a data processing apparatus Grigorios Magklis, Jacob Eapen, Mbou Eyole, David Hennah Mansell 2022-05-10
11314514 Vector length querying instruction Grigorios Magklis, Alejandro Martinez Vicente, Nathanael Premillieu 2022-04-26
11269634 Data structure relinquishing David Hennah Mansell, Matthew Evans 2022-03-08
11106465 Vector add-with-carry instruction Mbou Eyole, Neil Burgess, Grigorios Magklis 2021-08-31
11093243 Vector interleaving in a data processing apparatus Mbou Eyole 2021-08-17
11074214 Data processing Jelena Milanovic, Lee Evan Eisen 2021-07-27
11068268 Data structure processing David Hennah Mansell, Richard Roy Grisenthwaite, Matthew Evans 2021-07-20
11042378 Propagation instruction to generate a set of predicate flags based on previous and current prediction data Mbou Eyole, Alejandro Martinez Vicente 2021-06-22
11003447 Vector arithmetic and logical instructions performing operations on different first and second data element widths from corresponding first and second vector registers 2021-05-11
11003450 Vector data transfer instruction 2021-05-11
10963245 Anchored data element conversion David Raymond Lutz, Neil Burgess, Christopher Neal Hinds 2021-03-30
10877833 Vector atomic memory update instruction 2020-12-29
10824350 Handling contingent and non-contingent memory access program instructions making use of disable flag Grigorios Magklis 2020-11-03
10795675 Determine whether to fuse move prefix instruction and immediately following instruction independently of detecting identical destination registers Richard Roy Grisenthwaite 2020-10-06
10776124 Handling exceptional conditions for vector arithmetic instruction Giacomo Gabrielli 2020-09-15
10719383 Contingent load suppression Michael John Williams, Richard Roy Grisenthwaite 2020-07-21
10564968 Vector load instruction 2020-02-18
10521232 Data processing apparatus and method for processing a SIMD instruction specifying a control value having a first portion identifying a selected data size and a second portion identifying at least one control parameter having a number of bits that varies in dependence on a number of bits comprised by the first portion David James Seal, Richard Roy Grisenthwaite 2019-12-31
10430192 Vector processing using loops of dynamic vector length Grigorios Magklis, Alejandro Martinez Vicente, Nathanael Premillieu, Mbou Eyole 2019-10-01