Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11422822 | Multi-channel data path circuitry | Robert D. Kenney | 2022-08-23 |
| 9465744 | Data prefetch ramp implemenation based on memory utilization | Miles Robert Dooley, Richard J. Eickemeyer, John B. Griswell, Jr., Francis Patrick O'Connell, Jeffrey A. Stuecheli | 2016-10-11 |
| 8918552 | Managing misaligned DMA addresses | Gregory H. Bellows, Dean J. Burdick | 2014-12-23 |
| 8904064 | Managing an out-of-order asynchronous heterogeneous remote direct memory access (RDMA) message queue | Gregory H. Bellows | 2014-12-02 |
| 8856453 | Persistent prefetch data stream settings | Miles Robert Dooley, Richard J. Eickemeyer, Bradly G. Frey, Yaoqing Gao, Francis Patrick O'Connell +1 more | 2014-10-07 |
| 8316207 | Assigning efficiently referenced globally unique identifiers in a multi-core environment | Greg H. Bellows, Brian H. Horton, Joaquin Madruga | 2012-11-20 |
| 8244979 | System and method for cache-locking mechanism using translation table attributes for replacement class ID determination | Adam P. Burns, Jonathan James DeMent, Gavin B. Meil | 2012-08-14 |
| 8099579 | System and method for cache-locking mechanism using segment table attributes for replacement class ID determination | Adam P. Burns, Jonathan James DeMent, Gavin B. Meil | 2012-01-17 |
| 8046574 | Secure boot across a plurality of processors | Jonathan James DeMent, Clark M. O'Niell, Christopher J. Spandikow | 2011-10-25 |
| 8046573 | Masking a hardware boot sequence | Jonathan James DeMent, Clark M. O'Niell, Steven L. Roberts | 2011-10-25 |
| 8037293 | Selecting a random processor to boot on a multiprocessor system | Jonathan James DeMent, Clark M. O'Niell, Christopher J. Spandikow | 2011-10-11 |
| 7779273 | Booting a multiprocessor device based on selection of encryption keys to be provided to processors | Jonathan James DeMent, Clark M. O'Niell, Christopher J. Spandikow | 2010-08-17 |
| 7774616 | Masking a boot sequence by providing a dummy processor | Jonathan James DeMent, Clark M. O'Niell, Steven L. Roberts | 2010-08-10 |
| 7774617 | Masking a boot sequence by providing a dummy processor | Jonathan James DeMent, Clark M. O'Niell, Steven L. Roberts | 2010-08-10 |
| 7739477 | Multiple page size address translation incorporating page size prediction | Jeffrey Powers Bradford, Kimberly M. Fernsler, Timothy H. Heil, James Allen Rose | 2010-06-15 |
| 7594104 | System and method for masking a hardware boot sequence | Jonathan James DeMent, Clark M. O'Niell, Steven L. Roberts | 2009-09-22 |
| 7454602 | Pipeline having bifurcated global branch history buffer for indexing branch history table per instruction fetch group | Chris Abernathy, Jeffrey Powers Bradford, Timothy H. Heil | 2008-11-18 |
| 7284112 | Multiple page size address translation incorporating page size prediction | Jeffrey Powers Bradford, Kimberly M. Fernsler, Timothy H. Heil, James Allen Rose | 2007-10-16 |
| 7159095 | Method of efficiently handling multiple page sizes in an effective to real address translation (ERAT) table | Jonathan James DeMent, Kimberly M. Fernsler | 2007-01-02 |
| 6681321 | Method system and apparatus for instruction execution tracing with out of order processors | Jim A. Kahle, Douglas R. G. Logan, Alex E. Mericas, William J. Starke, Philip L. Vitale | 2004-01-20 |