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USPTO Patent Rankings Data through Dec 31, 2025
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Chris Abernathy — 16 Patents

NVIDIA: 15 patents #448 of 7,811Top 6%
IBM: 1 patents #44,878 of 70,183Top 65%
Austin, TX: #2,065 of 18,064 inventorsTop 15%
Texas: #9,126 of 125,132 inventorsTop 8%
Overall (All Time): #284,196 of 4,157,543Top 7%
16 Patents All Time
Chris Abernathy has been granted 16 US patents while listed as an inventor at NVIDIA. The first was granted in 2008 and the most recent in May 2024. Chris Abernathy ranks #284,196 of 4,157,543 US inventors in our database (top 6.8%). Patent records list Chris Abernathy in Austin, TX, US.

Issued Patents All Time

Showing 1–16 of 16 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11989583 Circuitry and method Eric C. Quinnell, Abhishek Raja, Michael Achenbach 2024-05-21 $71,657,000
11693666 Responding to branch misprediction for predicated-loop-terminating branch instruction Joseph Michael Pusdesris, Nicholas Andrew Plante, Yasuo Ishii 2023-07-04
11526359 Caching override indicators for statistically biased branches to selectively override a global branch predictor Yasuo Ishii, Muhammad Umar Farooq 2022-12-13
11204878 Writebacks of prefetched data Joseph Michael Pusdesris 2021-12-21
11086629 Misprediction of predicted taken branches in a data processing apparatus Yasuo Ishii, Muhammad Umar Farooq 2021-08-10
11029959 Branch target look up suppression Yasuo Ishii, Muhammad Umar Farooq 2021-06-08
10963258 Apparatus and method for performing multiple control flow predictions Yasuo Ishii, Muhammad Umar Farooq 2021-03-30
10817299 Handling multiple control flow instructions Yasuo Ishii 2020-10-27
10817426 Prefetching techniques Krishnendra Nathella, Huzefa Sanjeliwala, Dam Sunwoo, Balaji Vijayan 2020-10-27
10810126 Cache storage techniques Joseph Michael Pusdesris, Adrian Montero, Klas Magnus Bruce 2020-10-20
10776043 Storage circuitry request tracking Adrian Montero, Miles Robert Dooley, Joseph Michael Pusdesris, Klas Magnus Bruce 2020-09-15
10754687 Scheduling in a data processing apparatus . ABHISHEK RAJA, Michael Filippo 2020-08-25
10528355 Handling move instructions via register renaming or writing to a different physical register using control flags Florent Begon 2020-01-07
10521368 Arbitration of requests requiring a variable number of resources Max John Batley, Ian Michael Caulfield 2019-12-31
9542194 Speculative register file read suppression Florent Begon, Michael Filippo 2017-01-10
7454602 Pipeline having bifurcated global branch history buffer for indexing branch history table per instruction fetch group Jeffrey Powers Bradford, Jason N. Dale, Timothy H. Heil 2008-11-18 $4,805,000