HS

Huzefa Sanjeliwala

NV NVIDIA: 9 patents #816 of 7,811Top 15%
QU Qualcomm: 4 patents #3,802 of 12,104Top 35%
Overall (All Time): #365,132 of 4,157,543Top 9%
13
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12367157 Compressing translation lookaside buffer (TLB) tags using a TLB metadata buffer in processor-based devices Adrian Montero, Conrado Blasco, Paul Kitchin 2025-07-22
12182427 Controlling data allocation to storage circuitry Stefano GHIGGINI, Natalya Bondarenko, Luca NASSI, Geoffray Matthieu Lacourba, Miles Robert Dooley +1 more 2024-12-31
12135652 Filtering remote data synchronization barrier (DSB) instruction execution in processor-based devices Adrian Montero, Paul Kitchin 2024-11-05
12130751 Compressing translation lookaside buffer (TLB) tags using a TLB metadata buffer in processor-based devices Adrian Montero, Conrado Blasco, Paul Kitchin 2024-10-29
11914524 Latency management in synchronization events Adrian Montero, Paul Kitchin, Prarthna Santhanakrishnan, Conrado Blasco, Pradeep Kanapathipillai 2024-02-27
11663014 Speculatively executing instructions that follow a status updating instruction Abhishek Raja, Rakesh Shaji Lal, Michael Filippo, Glen Andrew Harris, Vasu Kudaravalli +1 more 2023-05-30
11392378 Executing a set of load operations for a gather-load instruction and controlling handling of another instruction that depends on completion of the gather-load instruction Abhishek Raja, Michael Filippo, Kelvin D. Goveas 2022-07-19
11194574 Merging memory ordering tracking information for issued load instructions Miles Robert Dooley, Balaji Vijayan, Abhishek Raja, Sharmila Shridhar 2021-12-07
10983916 Cache storage Klas Magnus Bruce, Leigang Kou, Michael Filippo, Miles Robert Dooley, Matthew A. Rafacz 2021-04-20
10866896 Apparatus and method for prefetching access request addresses in an adjacent region of memory Todd Rafacz 2020-12-15
10817426 Prefetching techniques Krishnendra Nathella, Chris Abernathy, Dam Sunwoo, Balaji Vijayan 2020-10-27
10372618 Apparatus and method for maintaining address translation data within an address translation cache Miles Robert Dooley, Abhishek Raja, Barry Duane Williamson 2019-08-06
10229066 Queuing memory access requests Miles Robert Dooley, Matthew A. Rafacz, Michael Filippo 2019-03-12