Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11392378 | Executing a set of load operations for a gather-load instruction and controlling handling of another instruction that depends on completion of the gather-load instruction | Abhishek Raja, Michael Filippo, Huzefa Sanjeliwala | 2022-07-19 |
| 11327791 | Apparatus and method for operating an issue queue | Michael Achenbach, Robert G. McDonald, Nicholas Andrew PFISTER, Michael Filippo, . ABHISHEK RAJA +1 more | 2022-05-10 |
| 10310809 | Apparatus and method for supporting a conversion instruction | David Raymond Lutz, Neil Burgess | 2019-06-04 |
| 9959122 | Single cycle instruction pipeline scheduling | Michael Estlick, Jay Fleischman, Kevin A. Hurd, Mark Gibson, Brian M. Lay | 2018-05-01 |
| 9317250 | Floating point multiply-add unit with denormal number support | Debjit Das Sarma, Scott A. Hilker, Hanbing Liu | 2016-04-19 |
| 9110802 | Processor and method implemented by a processor to implement mask load and store instructions | Edward J. McLellan, Steven Beigelmacher, David E. Kroesche, Michael T. Clark | 2015-08-18 |
| 8407271 | Method for floating point round to integer operation | Kevin A. Hurd, Daryl Lieu, Scott A. Hilker | 2013-03-26 |
| 7565513 | Processor with power saving reconfigurable floating point unit decoding an instruction to single full bit operation or multiple reduced bit operations | Ashraf Ahmed, Michael T. Clark, Jelena Ilic | 2009-07-21 |
| 7464255 | Using a shuffle unit to implement shift operations in a processor | Teik-Chung Tan | 2008-12-09 |
| 7284117 | Processor that predicts floating point instruction latency based on predicted precision | Arun Radhakrishnan | 2007-10-16 |
| 7028068 | Alternate phase dual compression-tree multiplier | Teik-Chung Tan | 2006-04-11 |
| 6122721 | Reservation station for a floating point processing unit | Michael D. Goddard, Norman Bujanos | 2000-09-19 |
| 5878266 | Reservation station for a floating point processing unit | Michael D. Goddard, Norman Bujanos | 1999-03-02 |
| 5761105 | Reservation station including addressable constant store for a floating point processing unit | Michael D. Goddard | 1998-06-02 |
| 5748516 | Floating point processing unit with forced arithmetic results | Michael D. Goddard | 1998-05-05 |