Issued Patents All Time
Showing 25 most recent of 26 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12423408 | Systems and methods for optimizing authentication branch instructions | Ian D. Kountanis, Douglas C. Holman, Sean M. Reynolds, Richard F. Russo | 2025-09-23 |
| 12373217 | Indirect branch predictor storing encrypted branch information fields | Jeffry E. Gonion, Ian D. Kountanis, Steven A. Myers, Yannick L. Sierra | 2025-07-29 |
| 12367157 | Compressing translation lookaside buffer (TLB) tags using a TLB metadata buffer in processor-based devices | Adrian Montero, Paul Kitchin, Huzefa Sanjeliwala | 2025-07-22 |
| 12288070 | Program counter zero-cycle loads | Muawya M. Al-Otoom, Deepankar Duggal, Ethan Schuchman, Ian D. Kountanis, Kulin N. Kothari +1 more | 2025-04-29 |
| 12130751 | Compressing translation lookaside buffer (TLB) tags using a TLB metadata buffer in processor-based devices | Adrian Montero, Paul Kitchin, Huzefa Sanjeliwala | 2024-10-29 |
| 11914524 | Latency management in synchronization events | Adrian Montero, Huzefa Sanjeliwala, Paul Kitchin, Prarthna Santhanakrishnan, Pradeep Kanapathipillai | 2024-02-27 |
| 11468168 | Systems and methods for optimizing authentication branch instructions | Ian D. Kountanis, Douglas C. Holman, Sean M. Reynolds, Richard F. Russo | 2022-10-11 |
| 11449343 | Indirect branch predictor storing encrypted branch information fields and security tag for security protection | Jeffry E. Gonion, Ian D. Kountanis, Steven A. Myers, Yannick L. Sierra | 2022-09-20 |
| 11416254 | Zero cycle load bypass in a decode group | Deepankar Duggal, Kulin N. Kothari, Muawya M. Al-Otoom | 2022-08-16 |
| 11379240 | Indirect branch predictor based on register operands | Muawya M. Al-Otoom, Ian D. Kountanis, Haoyan Jia, Amit Kumar | 2022-07-05 |
| 11200062 | History file for previous register mapping storage and last reference indication | Deepankar Duggal, Muawya M. Al-Otoom, Richard F. Russo | 2021-12-14 |
| 11093249 | Methods for partially preserving a branch predictor state | Brett S. Feero, David Williamson, Ian D. Kountanis, Shih-Chieh Wen | 2021-08-17 |
| 10901484 | Fetch predition circuit for reducing power consumption in a processor | Ronald P. Hall, Ramesh Gunna, Ian D. Kountanis, Shyam Sundar, André Seznec | 2021-01-26 |
| 10867031 | Marking valid return targets | Gregory D. Hughes, Gerard R. Williams, III, Jacques Anthony Vidrine, Jeffry E. Gonion, Timothy R. Paaske +1 more | 2020-12-15 |
| 10838723 | Speculative writes to special-purpose register | Christopher M. Tsay, Deepankar Duggal, Richard F. Russo | 2020-11-17 |
| 10838729 | System and method for predicting memory dependence when a source register of a push instruction matches the destination register of a pop instruction | Muawya M. Al-Otoom, Deepankar Duggal, Kulin N. Kothari, Richard F. Russo | 2020-11-17 |
| 10719327 | Branch prediction system | Muawya M. Al-Otoom, Ian D. Kountanis | 2020-07-21 |
| 10452434 | Hierarchical reservation station | Sean M. Reynolds | 2019-10-22 |
| 10241557 | Reducing power consumption in a processor | Ronald P. Hall, Ramesh Gunna, Ian D. Kountanis, Shyam Sundar, André Seznec | 2019-03-26 |
| 10223123 | Methods for partially saving a branch predictor state | Brett S. Feero, David Williamson, Ian D. Kountanis, Shih-Chieh Wen | 2019-03-05 |
| 10175982 | Storing taken branch information | Ian D. Kountanis | 2019-01-08 |
| 9952863 | Program counter capturing | Deepankar Duggal, Richard F. Russo | 2018-04-24 |
| 9940262 | Immediate branch recode that handles aliasing | Shyam Sundar, Richard F. Russo, Ronald P. Hall | 2018-04-10 |
| 9639369 | Split register file for operands of different sizes | — | 2017-05-02 |
| 9501284 | Mechanism for allowing speculative execution of loads beyond a wait for event instruction | Pradeep Kanapathipillai, Richard F. Russo, Sandeep Gupta | 2016-11-22 |