Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
DD

Deepankar Duggal — 16 Patents

Apple: 16 patents #2,077 of 18,612Top 15%
Sunnyvale, CA: #1,693 of 14,302 inventorsTop 15%
California: #37,952 of 386,348 inventorsTop 10%
Overall (All Time): #284,196 of 4,157,543Top 7%
16 Patents All Time
Deepankar Duggal has been granted 16 US patents while listed as an inventor at Apple. The first was granted in 2018 and the most recent in December 2025. Deepankar Duggal ranks #284,196 of 4,157,543 US inventors in our database (top 6.8%). Patent records list Deepankar Duggal in Sunnyvale, CA, US.

Patents per Year

Patents granted per year, 2018 to 2025Bar chart with a peak of 6 patents in 2025.peak 62018: 1 patents20182020: 4 patents20202021: 1 patents20212022: 1 patents20222024: 3 patents20242025: 6 patents2025

Issued Patents All Time

Showing 1–16 of 16 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12498932 Physical register sharing Richard F. Russo, Haoyan Jia 2025-12-16
12450068 Biased conditional instruction prediction Pruthivi Vuyyuru, Ian D. Kountanis 2025-10-21
12361119 Consistent speculation of pointer authentication John D. Pape, Christopher M. Tsay, Andrew Lin, Corey C Stappenbeck 2025-07-15
12321751 Re-use of speculative control transfer instruction results from wrong path Yuan C. Chou, Debasish Chandra, Niket K. Choudhary, Richard F. Russo 2025-06-03
12307256 Livelock detection and resolution using oldest operation tracking Haoyan Jia, Mridul Agarwal, Richard F. Russo, Debasish Chandra, Yanran Yang 2025-05-20
12288070 Program counter zero-cycle loads Muawya M. Al-Otoom, Conrado Blasco, Ethan Schuchman, Ian D. Kountanis, Kulin N. Kothari +1 more 2025-04-29
12175248 Re-use of speculative load instruction results from wrong path Yuan C. Chou, Debasish Chandra, Niket K. Choudhary, Richard F. Russo 2024-12-24 $240,476,000
12159142 Managing table accesses for tagged geometric length (TAGE) load value prediction Yuan C. Chou, Chang Xu, Debasish Chandra 2024-12-03 $369,762,000
12045615 Processing of synchronization barrier instructions Kulin N. Kothari, Mridul Agarwal, Chang Xu, Yanran Yang, Richard F. Russo +2 more 2024-07-23 $287,558,000
11416254 Zero cycle load bypass in a decode group Kulin N. Kothari, Conrado Blasco, Muawya M. Al-Otoom 2022-08-16 $228,519,000
11200062 History file for previous register mapping storage and last reference indication Conrado Blasco, Muawya M. Al-Otoom, Richard F. Russo 2021-12-14 $410,917,000
10846091 Coprocessor with distributed register Aditya Kesiraju, Andrew J. Beaumont-Smith, Ran A. Chachick 2020-11-24 $169,360,000
10838729 System and method for predicting memory dependence when a source register of a push instruction matches the destination register of a pop instruction Muawya M. Al-Otoom, Conrado Blasco, Kulin N. Kothari, Richard F. Russo 2020-11-17 $216,835,000
10838723 Speculative writes to special-purpose register Christopher M. Tsay, Conrado Blasco, Richard F. Russo 2020-11-17 $216,835,000
10628164 Branch resolve pointer optimization Kulin N. Kothari, Mridul Agarwal, Aditya Kesiraju, Sean M. Reynolds 2020-04-21 $110,357,000
9952863 Program counter capturing Conrado Blasco, Richard F. Russo 2018-04-24 $65,456,000