| 12423408 |
Systems and methods for optimizing authentication branch instructions |
Conrado Blasco, Ian D. Kountanis, Douglas C. Holman, Sean M. Reynolds |
2025-09-23 |
| 12321746 |
DSB operation with excluded region |
Jeff Gonion, John H. Kelm, James Vash, Pradeep Kanapathipillai, Mridul Agarwal +2 more |
2025-06-03 |
| 12321751 |
Re-use of speculative control transfer instruction results from wrong path |
Yuan C. Chou, Deepankar Duggal, Debasish Chandra, Niket K. Choudhary |
2025-06-03 |
| 12314200 |
Scalable interrupts |
Jeffrey E. Gonion, Charles E. Tucker, Tal Kuzi, Mridul Agarwal, Christopher M. Tsay +3 more |
2025-05-27 |
| 12307256 |
Livelock detection and resolution using oldest operation tracking |
Deepankar Duggal, Haoyan Jia, Mridul Agarwal, Debasish Chandra, Yanran Yang |
2025-05-20 |
| 12175248 |
Re-use of speculative load instruction results from wrong path |
Yuan C. Chou, Deepankar Duggal, Debasish Chandra, Niket K. Choudhary |
2024-12-24 |
| 12045615 |
Processing of synchronization barrier instructions |
Deepankar Duggal, Kulin N. Kothari, Mridul Agarwal, Chang Xu, Yanran Yang +2 more |
2024-07-23 |
| 12007920 |
Scalable interrupts |
Jeffrey E. Gonion, Charles E. Tucker, Tal Kuzi, Mridul Agarwal, Christopher M. Tsay +3 more |
2024-06-11 |
| 11720360 |
DSB operation with excluded region |
Jeff Gonion, John H. Kelm, James Vash, Pradeep Kanapathipillai, Mridul Agarwal +2 more |
2023-08-08 |
| 11630789 |
Scalable interrupts |
Jeffrey E. Gonion, Charles E. Tucker, Tal Kuzi, Mridul Agarwal, Christopher M. Tsay +3 more |
2023-04-18 |
| 11468168 |
Systems and methods for optimizing authentication branch instructions |
Conrado Blasco, Ian D. Kountanis, Douglas C. Holman, Sean M. Reynolds |
2022-10-11 |
| 11200062 |
History file for previous register mapping storage and last reference indication |
Deepankar Duggal, Conrado Blasco, Muawya M. Al-Otoom |
2021-12-14 |
| 10990159 |
Architected state retention for a frequent operating state switching processor |
Bernard J. Semeria, John H. Mylius, Pradeep Kanapathipillai, Shih-Chieh Wen, Richard H. Larson |
2021-04-27 |
| 10838723 |
Speculative writes to special-purpose register |
Christopher M. Tsay, Conrado Blasco, Deepankar Duggal |
2020-11-17 |
| 10838729 |
System and method for predicting memory dependence when a source register of a push instruction matches the destination register of a pop instruction |
Muawya M. Al-Otoom, Conrado Blasco, Deepankar Duggal, Kulin N. Kothari |
2020-11-17 |
| 10401945 |
Processor including multiple dissimilar processor cores that implement different portions of instruction set architecture |
David Williamson, Gerard R. Williams, III, James Nolan Hardage |
2019-09-03 |
| 10037073 |
Execution unit power management |
Edvin Catovic, Rajat Goel, Matthew R. Johnson, Shingo Suzuki, Pradeep Kanapathipillai +2 more |
2018-07-31 |
| 9958932 |
Processor including multiple dissimilar processor cores that implement different portions of instruction set architecture |
David Williamson, Gerard R. Williams, III, James Nolan Hardage |
2018-05-01 |
| 9952863 |
Program counter capturing |
Conrado Blasco, Deepankar Duggal |
2018-04-24 |
| 9940262 |
Immediate branch recode that handles aliasing |
Shyam Sundar, Ronald P. Hall, Conrado Blasco |
2018-04-10 |
| 9928115 |
Hardware migration between dissimilar cores |
James Nolan Hardage, Daniel U. Becker, Christopher M. Tsay, Shih-Chieh Wen, Richard H. Larson |
2018-03-27 |
| 9501284 |
Mechanism for allowing speculative execution of loads beyond a wait for event instruction |
Pradeep Kanapathipillai, Sandeep Gupta, Conrado Blasco |
2016-11-22 |