| 12367157 |
Compressing translation lookaside buffer (TLB) tags using a TLB metadata buffer in processor-based devices |
Conrado Blasco, Paul Kitchin, Huzefa Sanjeliwala |
2025-07-22 |
| 12135652 |
Filtering remote data synchronization barrier (DSB) instruction execution in processor-based devices |
Paul Kitchin, Huzefa Sanjeliwala |
2024-11-05 |
| 12130751 |
Compressing translation lookaside buffer (TLB) tags using a TLB metadata buffer in processor-based devices |
Conrado Blasco, Paul Kitchin, Huzefa Sanjeliwala |
2024-10-29 |
| 11914524 |
Latency management in synchronization events |
Huzefa Sanjeliwala, Paul Kitchin, Prarthna Santhanakrishnan, Conrado Blasco, Pradeep Kanapathipillai |
2024-02-27 |
| 11442863 |
Data processing apparatus and method for generating prefetches |
Alexander Cole Shulyak, Joseph Michael Pusdesris, Karthik Sundaram, Yasuo Ishii |
2022-09-13 |
| 11385896 |
Determining prefetch patterns with discontinuous strides |
Alexander Cole Shulyak, Joseph Michael Pusdesris, Balaji Vijayan |
2022-07-12 |
| 10810126 |
Cache storage techniques |
Joseph Michael Pusdesris, Klas Magnus Bruce, Chris Abernathy |
2020-10-20 |
| 10776043 |
Storage circuitry request tracking |
Miles Robert Dooley, Joseph Michael Pusdesris, Klas Magnus Bruce, Chris Abernathy |
2020-09-15 |
| 10102143 |
Eviction control for an address translation cache |
Barry Duane Williamson, Michael Filippo, Abhishek Raja, Miles Robert Dooley |
2018-10-16 |