Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12204785 | Memcpy micro-operation reduction | Yasuo Ishii, Steven Daniel Maclean, Nicholas Andrew Plante, Muhammad Umar Farooq, Michael Brian SCHINZLER +1 more | 2025-01-21 |
| 12175251 | Compression of entries in a reorder buffer | Alexander Cole Shulyak, . ABHISHEK RAJA, Bipin Prasad Heremagalur Ramaprasad, William E. Burky, Li Zhao Ma +3 more | 2024-12-24 |
| 11663014 | Speculatively executing instructions that follow a status updating instruction | Abhishek Raja, Rakesh Shaji Lal, Michael Filippo, Vasu Kudaravalli, Huzefa Sanjeliwala +1 more | 2023-05-30 |
| 11204773 | Storing a processing state based on confidence in a predicted branch outcome and a number of recent state changes | William E. Burky, Yasuo Ishii | 2021-12-21 |
| 10310862 | Data processing | Robert G. McDonald, Michael Filippo | 2019-06-04 |
| 9946545 | Buffer store with a main store and and auxiliary store | James Nolan Hardage, Mark Carpenter Glass | 2018-04-17 |
| 9081581 | Size mis-match hazard detection | James Nolan Hardage, Conrado Blasco Allue | 2015-07-14 |
| 8972701 | Setting zero bits in architectural register for storing destination operand of smaller size based on corresponding zero flag attached to renamed physical register | James Nolan Hardage, Mark Carpenter Glass | 2015-03-03 |
| 8914615 | Mapping same logical register specifier for different instruction sets with divergent association to architectural register file using common address format | James Nolan Hardage, Mark Carpenter Glass | 2014-12-16 |
| 8386754 | Renaming wide register source operand with plural short register source operands for select instructions to detect dependency fast with existing mechanism | Conrado Blasco Allue, David Williamson, James Nolan Hardage, Robert Gregory McDonald | 2013-02-26 |
| 7958335 | Multiple instruction set decoding | Conrado Blasco Allue, Stephen John Hill | 2011-06-07 |
| 7774582 | Result bypassing to override a data hazard within a superscalar processor | David Williamson, Stephen John Hill | 2010-08-10 |
| 7496899 | Preventing loss of traced information in a data processing apparatus | Stephen John Hill, David Williamson | 2009-02-24 |
| 7234043 | Decoding predication instructions within a superscaler data processing system | Conrado Blasco Allue, Stephen John Hill | 2007-06-19 |
| 5911151 | Optimizing block-sized operand movement utilizing standard instructions | Joseph C. Circello, James Nolan Hardage | 1999-06-08 |
| 5822764 | Method and circuit for efficiently replacing invalid locked portions of a cache with valid data | James Nolan Hardage | 1998-10-13 |
| 5781916 | Cache control circuitry and method therefor | James Nolan Hardage | 1998-07-14 |