| 12175251 |
Compression of entries in a reorder buffer |
Glen Andrew Harris, Alexander Cole Shulyak, . ABHISHEK RAJA, Bipin Prasad Heremagalur Ramaprasad, Li Zhao Ma +3 more |
2024-12-24 |
$46,652,000 |
| 12045620 |
Move elimination |
Yasuo Ishii, Muhammad Umar Farooq, Michael Brian SCHINZLER, Jason Lee Setter, David Gum Lim |
2024-07-23 |
$50,564,000 |
| 12026515 |
Instruction fusion |
Nicholas Andrew Plante, Alexander Cole Shulyak, Joshua David KNEBEL, Yasuo Ishii |
2024-07-02 |
$213,275,000 |
| 11204773 |
Storing a processing state based on confidence in a predicted branch outcome and a number of recent state changes |
Glen Andrew Harris, Yasuo Ishii |
2021-12-21 |
|
| 10977038 |
Checkpointing speculative register mappings |
— |
2021-04-13 |
|
| 9489207 |
Processor and method for partially flushing a dispatched instruction group including a mispredicted branch |
Brian R. Mestan, Dung Q. Nguyen, Balaram Sinharoy, Benjamin W. Stolt |
2016-11-08 |
$9,888,000 |
| 8495342 |
Configuring plural cores to perform an instruction having a multi-core characteristic |
Louis Bennie Capps, Jr., Michael J. Shapiro, Robert H. Bell, Jr., Thomas E. Cook |
2013-07-23 |
$2,085,000 |
| 8108655 |
Selecting fixed-point instructions to issue on load-store unit |
Christopher M. Abernathy, James Wilson Bishop, Mary D. Brown, Robert A. Cordes, Hung Q. Le +2 more |
2012-01-31 |
$4,013,000 |
| 8103852 |
Information handling system including a processor with a bifurcated issue queue |
James Wilson Bishop, Mary D. Brown, Todd A. Venton |
2012-01-24 |
$7,514,000 |
| 8099582 |
Tracking deallocated load instructions using a dependence matrix |
Christopher M. Abernathy, Mary D. Brown, Todd A. Venton |
2012-01-17 |
$12,258,000 |
| 8086826 |
Dependency tracking for enabling successive processor instructions to issue |
Mary D. Brown, Dung Q. Nguyen, Balaram Sinharoy |
2011-12-27 |
$5,499,000 |
| 8078999 |
Structure for implementing speculative clock gating of digital logic circuits |
Bartholomew Blaner, Mary D. Brown, Todd A. Venton |
2011-12-13 |
$19,280,000 |
| 8041928 |
Information handling system with real and virtual load/store instruction issue queue |
Kurt A. Feiste, Dung Q. Nguyen, Balaram Sinharoy, Albert Thomas Williams |
2011-10-18 |
$4,054,000 |
| 8033345 |
Apparatus and method for a drilling assembly |
Guy Randall, Brian Hollis, Joe Szarka, Neil M. Baker, Jack Weyer +2 more |
2011-10-11 |
$5,068,000 |
| 7991979 |
Issuing load-dependent instructions in an issue queue in a processing unit of a data processing system |
Christopher M. Abernathy, Mary D. Brown, Todd A. Venton |
2011-08-02 |
$4,890,000 |
| 7971161 |
Apparatus and method for implementing speculative clock gating of digital logic circuits |
Bartholomew Blaner, Mary D. Brown, Todd A. Venton |
2011-06-28 |
$4,369,000 |
| 7769986 |
Method and apparatus for register renaming |
Christopher M. Abernathy, Jens Leenstra, Nicolas Maeding |
2010-08-03 |
$4,325,000 |
| 7711929 |
Method and system for tracking instruction dependency in an out-of-order processor |
Krishnan K. Kailas |
2010-05-04 |
$4,679,000 |
| 7669038 |
Method and apparatus for back to back issue of dependent instructions in an out of order issue queue |
Raymond Cheung Yeung |
2010-02-23 |
$6,192,000 |
| 7660971 |
Method and system for dependency tracking and flush recovery for an out-of-order microprocessor |
Vikas Agarwal, Krishnan K. Kailas, Balaram Sinharoy |
2010-02-09 |
$5,437,000 |
| 7536395 |
Efficient dynamic register file design for multiple simultaneous bit encodings |
Vikas Agarwal, Zakaria Mahmood Khwaja |
2009-05-19 |
$10,497,000 |
| 7506139 |
Method and apparatus for register renaming using multiple physical register files and avoiding associative search |
Krishnan K. Kailas, Balaram Sinharoy |
2009-03-17 |
$4,806,000 |
| 7472258 |
Dynamically shared group completion table between multiple threads |
Peter Juergen Klim, Hung Q. Le |
2008-12-30 |
$5,097,000 |
| 7469407 |
Method for resource balancing using dispatch flush in a simultaneous multithread processor |
Richard J. Eickemeyer, Ronald Nick Kalla, David S. Levitan, Balaram Sinharoy, John W. Ward, III |
2008-12-23 |
$10,467,000 |
| 7380104 |
Method and apparatus for back to back issue of dependent instructions in an out of order issue queue |
Raymond Cheung Yeung |
2008-05-27 |
$8,304,000 |
