Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8768989 | Funnel shifter implementation | Lincoln R. Nunes, Geoffrey F. Oh | 2014-07-01 |
| 8482315 | One-of-n N-nary logic implementation of a storage cell | Michael R. Seningen | 2013-07-09 |
| 8429580 | Method for preparing for and formally verifying a modified integrated circuit design | Irfan Waheed, Mark H. Nodine | 2013-04-23 |
| 8418180 | Thread priority method for ensuring processing fairness in simultaneous multi-threading microprocessors | James Wilson Bishop, Hung Q. Le, Dung Q. Nguyen, Balaram Sinharoy, Brian W. Thompto | 2013-04-09 |
| 8397190 | Method for manipulating and repartitioning a hierarchical integrated circuit design | Robert D. Kenney, Paul K. Miller, Donald W. Glowka, Jeffrey B. Reed | 2013-03-12 |
| 8255669 | Method and apparatus for thread priority control in a multi-threaded processor based upon branch issue information including branch confidence information | Michael K. Gschwind, Robert Alan Philhower | 2012-08-28 |
| 8006070 | Method and apparatus for inhibiting fetch throttling when a processor encounters a low confidence branch instruction in an information handling system | Michael K. Gschwind, Robert Alan Philhower | 2011-08-23 |
| 7925853 | Method and apparatus for controlling memory array gating when a processor executes a low confidence branch instruction in an information handling system | Michael K. Gschwind, Robert Alan Philhower | 2011-04-12 |
| 7669038 | Method and apparatus for back to back issue of dependent instructions in an out of order issue queue | William E. Burky | 2010-02-23 |
| 7650486 | Dynamic recalculation of resource vector at issue queue for steering of dependent instructions | Hung Q. Le, Dung Q. Nguyen, Brian W. Thompto | 2010-01-19 |
| 7631308 | Thread priority method for ensuring processing fairness in simultaneous multi-threading microprocessors | James Wilson Bishop, Hung Q. Le, Dung Q. Nguyen, Balaram Sinharoy, Brian W. Thompto | 2009-12-08 |
| 7627742 | Method and apparatus for conserving power by throttling instruction fetching when a processor encounters low confidence branches in an information handling system | Pradip Bose, Alper Buyuktosunoglu, Chen-Yong Cher, Michael K. Gschwind, Ravi Nair +2 more | 2009-12-01 |
| 7490226 | Method using vector component comprising first and second bits to regulate movement of dependent instructions in a microprocessor | Hung Q. Le, Dung Q. Nguyen | 2009-02-10 |
| 7395414 | Dynamic recalculation of resource vector at issue queue for steering of dependent instructions | Hung Q. Le, Dung Q. Nguyen, Brian W. Thompto | 2008-07-01 |
| 7380104 | Method and apparatus for back to back issue of dependent instructions in an out of order issue queue | William E. Burky | 2008-05-27 |
| 7188233 | System and method for performing floating point store folding | Juergen Haess, Michael K. Kroener, Dung Q. Nguyen, Lawrence Powell, Eric M. Schwarz +1 more | 2007-03-06 |
| 7093106 | Register rename array with individual thread bits set upon allocation and cleared upon instruction completion | Asit S. Ambekar, Dung Q. Nguyen | 2006-08-15 |
| 7000047 | Mechanism for effectively handling livelocks in a simultaneous multithreading processor | Dung Q. Nguyen | 2006-02-14 |