JI

John W. Ward, III

IBM: 18 patents #6,125 of 70,183Top 9%
Overall (All Time): #256,899 of 4,157,543Top 7%
18
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
9342307 Allocation of counters from a pool of counters to track mappings of logical registers to physical registers for mapper based instruction executions Gregory W. Alexander, Brian D. Barrick 2016-05-17
9069546 Allocation of counters from a pool of counters to track mappings of logical registers to physical registers for mapper based instruction executions Gregory W. Alexander, Brian D. Barrick 2015-06-30
8661230 Allocation of counters from a pool of counters to track mappings of logical registers to physical registers for mapper based instruction executions Gregory W. Alexander, Brian D. Barrick 2014-02-25
8145885 Apparatus for randomizing instruction thread interleaving in a multi-thread processor Ronald Nick Kalla, Minh Michelle Quy Pham, Balaram Sinharoy 2012-03-27
7827388 Apparatus for adjusting instruction thread priority in a multi-thread processor Minh Michelle Quy Pham, Ronald Nick Kalla, Balaram Sinharoy 2010-11-02
7822954 Methods, systems, and computer program products for recovering from branch prediction latency Khary J. Alexander, James J. Bonanno, Brian R. Prasky, Anthony Saporito, Robert J. Sonnelitter, III 2010-10-26
7769984 Dual-issuance of microprocessor instructions using dual dependency matrices Gregory W. Alexander, Brian D. Barrick, Lee Evan Eisen 2010-08-03
7549095 Error detection enhancement in a microprocessor through the use of a second dependency matrix Gregory W. Alexander, Lee Evan Eisen, Brian W. Thompto 2009-06-16
7487334 Branch encoding before instruction cache write Brian R. Konigsburg, Hung Q. Le, David S. Levitan 2009-02-03
7475223 Fetch-side instruction dispatch group formation Brian R. Konigsburg, Hung Q. Le, David S. Levitan 2009-01-06
7469407 Method for resource balancing using dispatch flush in a simultaneous multithread processor William E. Burky, Richard J. Eickemeyer, Ronald Nick Kalla, David S. Levitan, Balaram Sinharoy 2008-12-23
7401208 Method and apparatus for randomizing instruction thread interleaving in a multi-thread processor Ronald Nick Kalla, Minh Michelle Quy Pham, Balaram Sinharoy 2008-07-15
7401207 Apparatus and method for adjusting instruction thread priority in a multi-thread processor Ronald Nick Kalla, Minh Michelle Quy Pham, Balaram Sinharoy 2008-07-15
7360062 Method and apparatus for selecting an instruction thread for processing in a multi-thread processor Ronald Nick Kalla, Minh Michelle Quy Pham, Balaram Sinharoy 2008-04-15
7305586 Accessing and manipulating microprocessor state Richard W. Doing, Michael Stephen Floyd, Ronald Nick Kalla 2007-12-04
7269715 Instruction grouping history on fetch-side dispatch group formation Hung Q. Le, David S. Levitan 2007-09-11
7213135 Method using a dispatch flush in a simultaneous multithread processor to resolve exception conditions William E. Burky, Ronald Nick Kalla, Balaram Sinharoy 2007-05-01
7013400 Method for managing power in a simultaneous multithread processor by loading instructions into pipeline circuit during select times based on clock signal frequency and selected power mode Ronald Nick Kalla, Minh Michelle Quy Pham 2006-03-14