RI

Robert J. Sonnelitter, III

IBM: 72 patents #999 of 70,183Top 2%
📍 Wappingers Falls, NY: #19 of 884 inventorsTop 3%
🗺 New York: #1,028 of 115,490 inventorsTop 1%
Overall (All Time): #27,753 of 4,157,543Top 1%
72
Patents All Time

Issued Patents All Time

Showing 1–25 of 72 patents

Patent #TitleCo-InventorsDate
12050538 Castout handling in a distributed cache topology Ekaterina M. Ambroladze, Timothy C. Bronson, Michael A. Blake, Tu-An T. Nguyen 2024-07-30
11960426 Cable pair concurrent servicing Rajat Rao, Patrick J. Meaney, Glenn D. Gilda, Michael Jason Cade, Hubert Harrer +3 more 2024-04-16
11947418 Remote access array Ram Sai Manoj Bamdhamravuri, Ulrich Mayer, Chad G. Wilson, Avery Francois 2024-04-02
11868259 System coherency protocol Vesselina K. Papazova, Chad G. Wilson, Chakrapani Rayadurgam 2024-01-09
11620231 Lateral persistence directory states Ram Sai Manoj Bamdhamravuri, Craig R. Walters, Christian Jacobi, Timothy C. Bronson, Gregory W. Alexander +4 more 2023-04-04
11461151 Controller address contention assumption Michael Fee, Craig R. Walters, Arthur J. O'Neill, Matthias Klein 2022-10-04
11042483 Efficient eviction of whole set associated cache or selected range of addresses Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Vesselina K. Papazova 2021-06-22
11010210 Controller address contention assumption Michael Fee, Craig R. Walters, Arthur J. O'Neill, Matthias Klein 2021-05-18
10915461 Multilevel cache eviction management Ekaterina M. Ambroladze, Matthias Klein, Craig R. Walters, Kevin Lopes, Michael A. Blake +4 more 2021-02-09
10901902 Efficient inclusive cache management Chad G. Wilson, Tim Bronson, Ekaterina M. Ambroladze, Hieu T. Huynh, Jason D. Kohl +1 more 2021-01-26
10891232 Page-based memory operation with hardware initiated secure storage key update Kevin Lopes, Deanna Postles Dunn Berger, Jason D. Kohl 2021-01-12
10831661 Coherent cache with simultaneous data requests in same addressable index Ekaterina M. Ambroladze, Tim Bronson, Deanna Postles Dunn Berger, Chad G. Wilson, Kenneth D. Klapproth +3 more 2020-11-10
10824565 Configuration based cache coherency protocol selection Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Michael Fee, Arthur J. O'Neill 2020-11-03
10795824 Speculative data return concurrent to an exclusive invalidate request Deanna Postles Dunn Berger, Christian Jacobi, Craig R. Walters 2020-10-06
10649908 Non-disruptive clearing of varying address ranges from cache Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Michael A. Blake, Pak-kin Mak, Guy G. Tracy +1 more 2020-05-12
10628314 Dual clusters of fully connected integrated circuit multiprocessors with shared high-level cache Michael A. Blake, Timothy C. Bronson, Pak-kin Mak, Vesselina K. Papazova 2020-04-21
10628313 Dual clusters of fully connected integrated circuit multiprocessors with shared high-level cache Michael A. Blake, Timothy C. Bronson, Pak-kin Mak, Vesselina K. Papazova 2020-04-21
10529396 Preinstall of partial store cache lines Ekaterina M. Ambroladze, Sascha Junghans, Matthias Klein, Pak-kin Mak, Chad G. Wilson 2020-01-07
10437729 Non-disruptive clearing of varying address ranges from cache Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Michael A. Blake, Pak-kin Mak, Guy G. Tracy +1 more 2019-10-08
10402328 Configuration based cache coherency protocol selection Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Michael Fee, Arthur J. O'Neill 2019-09-03
10394712 Configuration based cache coherency protocol selection Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Michael Fee, Arthur J. O'Neill 2019-08-27
10379776 Operation interlocking in an address-sliced cache system Deanna Postles Dunn Berger, Michael A. Blake, Ashraf ElSharif, Kenneth D. Klapproth, Pak-kin Mak +1 more 2019-08-13
10380020 Achieving high bandwidth on ordered direct memory access write stream into a processor cache Ekaterina M. Ambroladze, Timothy C. Bronson, Matthias Klein, Pak-kin Mak, Vesselina K. Papazova +1 more 2019-08-13
10331576 Deadlock avoidance in a multi-processor computer system with extended cache line locking Michael A. Blake, Pak-kin Mak, Timothy W. Steele, Gary E. Strait, Poornima P Sulibele +1 more 2019-06-25
10310982 Target cache line arbitration within a processor cluster Deanna Postles Dunn Berger, Johnathon J. Hoste, Pak-kin Mak, Arthur J. O'Neill 2019-06-04