Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Patrick J. Meaney — 138 Patents

IBM: 137 patents #342 of 70,183Top 1%
Poughkeepsie, NY: #17 of 1,613 inventorsTop 2%
New York: #289 of 115,490 inventorsTop 1%
Overall (All Time): #7,400 of 4,157,543Top 1%
138 Patents All Time
Patrick J. Meaney has been granted 138 US patents while listed as an inventor at IBM. The first was granted in 1995 and the most recent in August 2025. Patrick J. Meaney ranks #7,400 of 4,157,543 US inventors in our database (top 0.18%). Patent records list Patrick J. Meaney in Poughkeepsie, NY, US.

Issued Patents All Time

Showing 1–25 of 138 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12380004 Dynamic multi-lane degrade capability to facilitate uninterrupted service Rajat Rao, Ashutosh Mishra, Jason Andrew Thompson, Nandini Gaadam Nagaraj 2025-08-05
12188979 Error protection analysis of an integrated circuit Benjamin Neil Trombley, Chung-Lung K. Shum, Karl Evan Smock Anderson, Bodo Hoppe, Erica Stuecheli +3 more 2025-01-07
11960426 Cable pair concurrent servicing Rajat Rao, Glenn D. Gilda, Michael Jason Cade, Robert J. Sonnelitter, III, Hubert Harrer +3 more 2024-04-16 $17,011,000
11907074 Low-latency deserializer having fine granularity and defective-lane compensation Ashutosh Mishra, Paul Allen Ganfield, Christian Jacobi, Logan I. Friedman, Jentje Leenstra +2 more 2024-02-20 $7,691,000
11687254 Host synchronized autonomous data chip address sequencer for a distributed buffer memory system Steven R. Carlough, Susan M. Eickhoff, Stephen J. Powell, Gary A. Van Huben, Jie Zheng 2023-06-27 $4,778,000
11646861 Low-latency, high-availability and high-speed SerDes interface having multiple synchronization modes Ashutosh Mishra, Paul Allen Ganfield, Christian Jacobi, Logan I. Friedman, Jentje Leenstra +3 more 2023-05-09 $3,203,000
11609817 Low latency availability in degraded redundant array of independent memory Glenn D. Gilda, David D. Cadigan, Lawrence W. Jones 2023-03-21 $41,358,000
11587600 Address/command chip controlled data chip address sequencing for a distributed memory buffer system Steven R. Carlough, Susan M. Eickhoff, Warren E. Maule, Stephen J. Powell, Gary A. Van Huben +1 more 2023-02-21 $5,683,000
11520659 Refresh-hiding memory system staggered refresh Glenn D. Gilda, David D. Cadigan, Christian Jacobi, Lawrence W. Jones, Stephen J. Powell 2022-12-06 $6,201,000
11379123 Address/command chip synchronized autonomous data chip address sequencer for a distributed buffer memory system Steven R. Carlough, Susan M. Eickhoff, Stephen J. Powell, Gary A. Van Huben, Jie Zheng 2022-07-05 $7,280,000
11200119 Low latency availability in degraded redundant array of independent memory Glenn D. Gilda, David D. Cadigan, Lawrence W. Jones 2021-12-14 $4,192,000
11088782 Use of a cyclic redundancy code multiple-input shift register to provide early warning and fail detection Steven R. Carlough, Gary A. Van Huben 2021-08-10 $4,960,000
10976939 Address/command chip synchronized autonomous data chip address sequencer for a distributed buffer memory system Steven R. Carlough, Susan M. Eickhoff, Stephen J. Powell, Gary A. Van Huben, Jie Zheng 2021-04-13 $3,936,000
10901839 Common high and low random bit error correction logic James A. O'Connor, Barry M. Trager, Warren E. Maule, Brad W. Michael, Marc A. Gollub 2021-01-26 $1,788,000
10824508 High efficiency redundant array of independent memory Christian Jacobi, Barry M. Trager 2020-11-03 $4,313,000
10824504 Common high and low random bit error correction logic James A. O'Connor, Barry M. Trager, Warren E. Maule, Marc A. Gollub, Brad W. Michael 2020-11-03 $4,313,000
10747442 Host controlled data chip address sequencing for a distributed memory buffer system Steven R. Carlough, Susan M. Eickhoff, Warren E. Maule, Stephen J. Powell, Gary A. Van Huben +1 more 2020-08-18 $3,155,000
10684968 Conditional memory spreading for heterogeneous memory sizes David D. Cadigan, Thomas J. Dewkett, Glenn D. Gilda, Craig R. Walters 2020-06-16 $3,682,000
10673732 Dynamic time-domain reflectometry analysis for field replaceable unit isolation in a running system Luiz C. Alves, Christopher N. Oelsner, Gary A. Peterson, Christopher W. Steffen 2020-06-02 $2,290,000
10666540 Dynamic time-domain reflectometry analysis for field replaceable unit isolation in a running system Luiz C. Alves, Christopher N. Oelsner, Gary A. Peterson, Christopher W. Steffen 2020-05-26 $2,933,000
10642535 Register access in a distributed memory buffer system Steven R. Carlough, Markus Cebulla, Susan M. Eickhoff, Logan I. Friedman, Walter Pietschmann +2 more 2020-05-05 $3,712,000
10613951 Memory mirror invocation upon detecting a correctable error Marc A. Gollub, Warren E. Maule 2020-04-07 $1,846,000
10606692 Error correction potency improvement via added burst beats in a dram access cycle Paul W. Coteus, Kyu-hyoun Kim, Luis A. Lastras-Montano, Warren E. Maule, James A. O'Connor +1 more 2020-03-31 $1,667,000
10601448 Reduced latency error correction decoding Glenn D. Gilda, Arthur J. O'Neill, Barry M. Trager 2020-03-24 $1,716,000
10558519 Power-reduced redundant array of independent memory (RAIM) system Glenn D. Gilda 2020-02-11 $2,410,000