Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11868259 | System coherency protocol | Vesselina K. Papazova, Robert J. Sonnelitter, III, Chad G. Wilson | 2024-01-09 |
| 10901902 | Efficient inclusive cache management | Chad G. Wilson, Robert J. Sonnelitter, III, Tim Bronson, Ekaterina M. Ambroladze, Hieu T. Huynh +1 more | 2021-01-26 |
| 10289512 | Persistent command parameter table for pre-silicon device testing | Dean G. Bair, Rebecca M. Gott, Edward J. Kaminski, Jr., William J. Lewis | 2019-05-14 |
| 9892010 | Persistent command parameter table for pre-silicon device testing | Dean G. Bair, Rebecca M. Gott, Edward J. Kaminski, Jr., William J. Lewis | 2018-02-13 |
| 9619312 | Persistent command parameter table for pre-silicon device testing | Dean G. Bair, Rebecca M. Gott, Edward J. Kaminski, Jr., William J. Lewis | 2017-04-11 |
| 9524801 | Persistent command parameter table for pre-silicon device testing | Dean G. Bair, Rebecca M. Gott, Edward J. Kaminski, Jr., William J. Lewis | 2016-12-20 |
| 7747908 | System and method for creating different start cache and bus states using multiple test patterns for processor design verification and validation | Shubhodeep Roy Choudhury, Manoj Dusanapudi, Sunil Suresh Hatti, Shakti Kapoor, Batchu Naga Venkata Satyanarayana | 2010-06-29 |
| 7661023 | System and method for verification of cache snoop logic and coherency between instruction & data caches for processor design verification and validation | Sampan Arora, Shubhodeep Roy Choudhury, Manoj Dusanapudi, Sunil Suresh Hatti, Shakti Kapoor | 2010-02-09 |