EA

Ekaterina M. Ambroladze

IBM: 46 patents #1,923 of 70,183Top 3%
📍 Somers, NY: #19 of 237 inventorsTop 9%
🗺 New York: #2,124 of 115,490 inventorsTop 2%
Overall (All Time): #62,169 of 4,157,543Top 2%
46
Patents All Time

Issued Patents All Time

Showing 1–25 of 46 patents

Patent #TitleCo-InventorsDate
12332783 Input/output (I/O) store protocol for pipelining coherent operations Matthias Klein, Sascha Junghans, Kevin Lopes 2025-06-17
12050538 Castout handling in a distributed cache topology Robert J. Sonnelitter, III, Timothy C. Bronson, Michael A. Blake, Tu-An T. Nguyen 2024-07-30
11042483 Efficient eviction of whole set associated cache or selected range of addresses Robert J. Sonnelitter, III, Deanna Postles Dunn Berger, Vesselina K. Papazova 2021-06-22
10915461 Multilevel cache eviction management Robert J. Sonnelitter, III, Matthias Klein, Craig R. Walters, Kevin Lopes, Michael A. Blake +4 more 2021-02-09
10901902 Efficient inclusive cache management Chad G. Wilson, Robert J. Sonnelitter, III, Tim Bronson, Hieu T. Huynh, Jason D. Kohl +1 more 2021-01-26
10831661 Coherent cache with simultaneous data requests in same addressable index Tim Bronson, Robert J. Sonnelitter, III, Deanna Postles Dunn Berger, Chad G. Wilson, Kenneth D. Klapproth +3 more 2020-11-10
10824565 Configuration based cache coherency protocol selection Deanna Postles Dunn Berger, Michael Fee, Arthur J. O'Neill, Robert J. Sonnelitter, III 2020-11-03
10649908 Non-disruptive clearing of varying address ranges from cache Deanna Postles Dunn Berger, Michael A. Blake, Pak-kin Mak, Robert J. Sonnelitter, III, Guy G. Tracy +1 more 2020-05-12
10529396 Preinstall of partial store cache lines Sascha Junghans, Matthias Klein, Pak-kin Mak, Robert J. Sonnelitter, III, Chad G. Wilson 2020-01-07
10528253 Increased bandwidth of ordered stores in a non-uniform memory subsystem Garrett M. Drapala, Norbert Hagspiel, Sascha Junghans, Matthias Klein, Gary E. Strait 2020-01-07
10437729 Non-disruptive clearing of varying address ranges from cache Deanna Postles Dunn Berger, Michael A. Blake, Pak-kin Mak, Robert J. Sonnelitter, III, Guy G. Tracy +1 more 2019-10-08
10402328 Configuration based cache coherency protocol selection Deanna Postles Dunn Berger, Michael Fee, Arthur J. O'Neill, Robert J. Sonnelitter, III 2019-09-03
10394712 Configuration based cache coherency protocol selection Deanna Postles Dunn Berger, Michael Fee, Arthur J. O'Neill, Robert J. Sonnelitter, III 2019-08-27
10380020 Achieving high bandwidth on ordered direct memory access write stream into a processor cache Timothy C. Bronson, Matthias Klein, Pak-kin Mak, Vesselina K. Papazova, Robert J. Sonnelitter, III +1 more 2019-08-13
10169272 Data processing apparatus and method Norbert Hagspiel, Sascha Junghans, Matthias Klein, Jeorg Walter 2019-01-01
10169260 Multiprocessor cache buffer management Deanna Postles Dunn Berger, Michael Fee, Arthur J. O'Neill 2019-01-01
10055355 Non-disruptive clearing of varying address ranges from cache Deanna Postles Dunn Berger, Michael A. Blake, Pak-kin Mak, Robert J. Sonnelitter, III, Guy G. Tracy +1 more 2018-08-21
10042554 Increased bandwidth of ordered stores in a non-uniform memory subsystem Garrett M. Drapala, Norbert Hagspiel, Sascha Junghans, Matthias Klein, Gary E. Strait 2018-08-07
9898407 Configuration based cache coherency protocol selection Deanna Postles Dunn Berger, Michael Fee, Arthur J. O'Neill, Robert J. Sonnelitter, III 2018-02-20
9892067 Multiprocessor cache buffer management Deanna Postles Dunn Berger, Michael Fee, Arthur J. O'Neill 2018-02-13
9886382 Configuration based cache coherency protocol selection Deanna Postles Dunn Berger, Michael Fee, Arthur J. O'Neill, Robert J. Sonnelitter, III 2018-02-06
9858190 Maintaining order with parallel access data streams Timothy C. Bronson, Garrett M. Drapala, Michael Fee, Matthias Klein, Pak-kin Mak +2 more 2018-01-02
9703661 Eliminate corrupted portions of cache during runtime Michael A. Blake, Michael Fee, Arthur J. O'Neill 2017-07-11
9678848 Eliminate corrupted portions of cache during runtime Michael A. Blake, Michael Fee, Arthur J. O'Neill 2017-06-13
9594689 Designated cache data backup during system operation Deanna Postles Dunn Berger, Garrett M. Drapala, Michael Fee, Pak-kin Mak, Arthur J. O'Neill +1 more 2017-03-14