Issued Patents All Time
Showing 25 most recent of 31 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12158848 | Combining peripheral component interface express partial store commands along cache line boundaries | Sascha Junghans, Matthias Klein, Julian Heyne, Fahmiyah Samad, Ananth Garikapati | 2024-12-03 |
| 11354094 | Hierarchical sort/merge structure using a request pipe | Jörg-Stephan Vogt, Thomas Fuchs, Thomas St. Pierre | 2022-06-07 |
| 11048475 | Multi-cycle key compares for keys and records of variable length | Jörg-Stephan Vogt, Christian Jacobi, Thomas Fuchs | 2021-06-29 |
| 10936283 | Buffer size optimization in a hierarchical structure | Jörg-Stephan Vogt, Christian Jacobi, Matthias Klein | 2021-03-02 |
| 10936517 | Data transfer using a descriptor | Sascha Junghans, Matthias Klein, Joerg Walter | 2021-03-02 |
| 10896022 | Sorting using pipelined compare units | Jörg-Stephan Vogt, Christian Jacobi, Matthias Klein | 2021-01-19 |
| 10528253 | Increased bandwidth of ordered stores in a non-uniform memory subsystem | Ekaterina M. Ambroladze, Garrett M. Drapala, Sascha Junghans, Matthias Klein, Gary E. Strait | 2020-01-07 |
| 10423546 | Configurable ordering controller for coupling transactions | Sascha Junghans, Matthias Klein, Girish G. Kurup | 2019-09-24 |
| 10394733 | Data transfer using a descriptor | Sascha Junghans, Matthias Klein, Joerg Walter | 2019-08-27 |
| 10353833 | Configurable ordering controller for coupling transactions | Sascha Junghans, Matthias Klein, Girish G. Kurup | 2019-07-16 |
| 10169272 | Data processing apparatus and method | Ekaterina M. Ambroladze, Sascha Junghans, Matthias Klein, Jeorg Walter | 2019-01-01 |
| 10042554 | Increased bandwidth of ordered stores in a non-uniform memory subsystem | Ekaterina M. Ambroladze, Garrett M. Drapala, Sascha Junghans, Matthias Klein, Gary E. Strait | 2018-08-07 |
| 10007625 | Resource allocation by virtual channel management and bus multiplexing | Sascha Junghans, Matthias Klein, Joerg Walter | 2018-06-26 |
| 9916268 | Data transfer using a descriptor | Sascha Junghans, Matthias Klein, Joerg Walter | 2018-03-13 |
| 9767048 | Initializing I/O devices | Sascha Junghans, Matthias Klein, Joerg Walter | 2017-09-19 |
| 9606891 | Tracing data from an asynchronous interface | Sascha Junghans, Matthias Klein, Joerg Walter | 2017-03-28 |
| 9471522 | Resource allocation by virtual channel management and bus multiplexing | Sascha Junghans, Matthias Klein, Joerg Walter | 2016-10-18 |
| 9396116 | Write and read collision avoidance in single port memory devices | Sascha Junghans, Matthias Klein, Joerg Walter | 2016-07-19 |
| 9390017 | Write and read collision avoidance in single port memory devices | Sascha Junghans, Matthias Klein, Joerg Walter | 2016-07-12 |
| 9372805 | Operating on translation look-aside buffers in a multiprocessor environment | Lisa C. Heller, Ute Gaertner, Hanno Ulrich, Rebecca S. Wisniewski | 2016-06-21 |
| 9183041 | Input/output traffic backpressure prediction | Matthias Klein | 2015-11-10 |
| 9183042 | Input/output traffic backpressure prediction | Matthias Klein | 2015-11-10 |
| 8995210 | Write and read collision avoidance in single port memory devices | Sascha Junghans, Matthias Klein, Joerg Walter | 2015-03-31 |
| 8850129 | Memory ordered store system in a multiprocessor computer system | Matthias Klein, Ulrich Mayer, Robert J. Sonnelitter, III, Gary E. Strait, Hanno Ulrich | 2014-09-30 |
| 8762615 | Dequeue operation using mask vector to manage input/output interruptions | Janet R. Easton, Bernd Nerz | 2014-06-24 |