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USPTO Patent Rankings Data through Dec 31, 2025
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Michael Fee — 93 Patents

IBM: 93 patents #652 of 70,183Top 1%
Cold Spring, NY: #1 of 66 inventorsTop 2%
New York: #660 of 115,490 inventorsTop 1%
Overall (All Time): #16,773 of 4,157,543Top 1%
93 Patents All Time
Michael Fee has been granted 93 US patents while listed as an inventor at IBM. The first was granted in 2000 and the most recent in January 2024. Michael Fee ranks #16,773 of 4,157,543 US inventors in our database (top 0.40%). Patent records list Michael Fee in Cold Spring, NY, US.

Issued Patents All Time

Showing 1–25 of 93 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11880304 Cache management using cache scope designation Taylor J. Pritchard, Aaron Tsai, Richard Joseph Branciforte, Ashraf ElSharif, Gregory W. Alexander +1 more 2024-01-23 $16,624,000
11681567 Method and processor system for executing a TELT instruction to access a data item during execution of an atomic primitive Ralf Winkelmann, Matthias Klein, Carsten Otte, Edward W. Chencinski, Hanno Eichelberger 2023-06-20 $4,843,000
11461151 Controller address contention assumption Robert J. Sonnelitter, III, Craig R. Walters, Arthur J. O'Neill, Matthias Klein 2022-10-04 $9,590,000
11321146 Executing an atomic primitive in a multi-core processor system Ralf Winkelmann, Matthias Klein, Carsten Otte, Edward W. Chencinski, Hanno Eichelberger 2022-05-03 $6,057,000
11010210 Controller address contention assumption Robert J. Sonnelitter, III, Craig R. Walters, Arthur J. O'Neill, Matthias Klein 2021-05-18 $4,116,000
10824565 Configuration based cache coherency protocol selection Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Arthur J. O'Neill, Robert J. Sonnelitter, III 2020-11-03 $4,313,000
10402328 Configuration based cache coherency protocol selection Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Arthur J. O'Neill, Robert J. Sonnelitter, III 2019-09-03 $15,611,000
10394712 Configuration based cache coherency protocol selection Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Arthur J. O'Neill, Robert J. Sonnelitter, III 2019-08-27 $1,335,000
10176002 Quiesce handling in multithreaded environments Ute Gaertner, Lisa C. Heller, Thomas Koehler, Frank Lehnert, Jennifer A. Navarro 2019-01-08 $2,287,000
10169260 Multiprocessor cache buffer management Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Arthur J. O'Neill 2019-01-01
10025608 Quiesce handling in multithreaded environments Ute Gaertner, Lisa C. Heller, Thomas Koehler, Frank Lehnert, Jennifer A. Navarro 2018-07-17 $3,360,000
9929749 Clock path technique for using on-chip circuitry to generate a correct encode pattern to test the on-chip circuitry Ronald J. Frishmuth, Mary P. Kusko, Cedric Lichtenau 2018-03-27 $2,459,000
9923579 Clock path technique for using on-chip circuitry to generate a correct encode pattern to test the on-chip circuitry Ronald J. Frishmuth, Mary P. Kusko, Cedric Lichtenau 2018-03-20 $2,525,000
9915701 Bypassing an encoded latch on a chip during a test-pattern scan Ronald J. Frishmuth, Mary P. Kusko, Cedric Lichtenau 2018-03-13 $2,527,000
9910090 Bypassing an encoded latch on a chip during a test-pattern scan Ronald J. Frishmuth, Mary P. Kusko, Cedric Lichtenau 2018-03-06 $2,330,000
9898407 Configuration based cache coherency protocol selection Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Arthur J. O'Neill, Robert J. Sonnelitter, III 2018-02-20 $3,618,000
9892067 Multiprocessor cache buffer management Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Arthur J. O'Neill 2018-02-13 $2,196,000
9886382 Configuration based cache coherency protocol selection Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Arthur J. O'Neill, Robert J. Sonnelitter, III 2018-02-06 $2,625,000
9858190 Maintaining order with parallel access data streams Ekaterina M. Ambroladze, Timothy C. Bronson, Garrett M. Drapala, Matthias Klein, Pak-kin Mak +2 more 2018-01-02 $1,907,000
9792213 Mitigating busy time in a high performance cache Deanna Postles Dunn Berger, Christine C. Jones, Arthur J. O'Neill, Diana L. Orf, Robert J. Sonnelitter, III 2017-10-17 $4,096,000
9734110 Dynamic synchronous to asynchronous frequency transitions in high-performance symmetric multiprocessing Garrett M. Drapala, Kenneth D. Klapproth, Robert J. Sonnelitter, III 2017-08-15 $1,588,000
9703661 Eliminate corrupted portions of cache during runtime Ekaterina M. Ambroladze, Michael A. Blake, Arthur J. O'Neill 2017-07-11 $1,748,000
9678848 Eliminate corrupted portions of cache during runtime Ekaterina M. Ambroladze, Michael A. Blake, Arthur J. O'Neill 2017-06-13 $2,356,000
9678830 Recovery improvement for quiesced systems Ute Gaertner, Lisa C. Heller, Frank Lehnert, Jennifer A. Navarro, Rebecca S. Wisniewski 2017-06-13 $2,356,000
9665424 Recovery improvement for quiesced systems Ute Gaertner, Lisa C. Heller, Frank Lehnert, Jennifer A. Navarro, Rebecca S. Wisniewski 2017-05-30 $1,983,000