Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11119766 | Hardware accelerator with locally stored macros | Michael James Healy, Jason A. Viehland, Jeffrey H. Derby | 2021-09-14 |
| 9792213 | Mitigating busy time in a high performance cache | Deanna Postles Dunn Berger, Michael Fee, Christine C. Jones, Arthur J. O'Neill, Robert J. Sonnelitter, III | 2017-10-17 |
| 9594689 | Designated cache data backup during system operation | Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Garrett M. Drapala, Michael Fee, Pak-kin Mak +1 more | 2017-03-14 |
| 9298468 | Monitoring processing time in a shared pipeline | Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Michael Fee, Christine C. Jones, Arthur J. O'Neill +1 more | 2016-03-29 |
| 9158694 | Mitigating busy time in a high performance cache | Deanna Postles Dunn Berger, Michael Fee, Christine C. Jones, Arthur J. O'Neill, Robert J. Sonnelitter, III | 2015-10-13 |
| 9104583 | On demand allocation of cache buffer slots | Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Michael Fee, Christine C. Jones | 2015-08-11 |
| 8930628 | Managing in-line store throughput reduction | Deanna Postles Dunn Berger, Michael Fee, Christine C. Jones, Robert J. Sonnelitter, III | 2015-01-06 |
| 8706970 | Dynamic cache queue allocation based on destination availability | Robert J. Sonnelitter, III | 2014-04-22 |
| 8671267 | Monitoring processing time in a shared pipeline | Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Michael Fee, Christine C. Jones, Arthur J. O'Neill +1 more | 2014-03-11 |
| 8560803 | Dynamic cache queue allocation based on destination availability | Robert J. Sonnelitter, III | 2013-10-15 |
| 8522076 | Error detection and recovery in a shared pipeline | Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Michael Fee, Arthur J. O'Neill, Robert J. Sonnelitter, III | 2013-08-27 |
| 8521960 | Mitigating busy time in a high performance cache | Deanna Postles Dunn Berger, Michael Fee, Christine C. Jones, Arthur J. O'Neill, Robert J. Sonnelitter, III | 2013-08-27 |
| 8495452 | Handling corrupted background data in an out of order execution environment | Michael Fee, Christian Habermann, Christian Jacobi, Martin Recktenwald, Hans-Werner Tast +1 more | 2013-07-23 |
| 8468536 | Multiple level linked LRU priority | Deanna Postles Dunn Berger, Ekaterina M. Ambroladze, Michael Fee | 2013-06-18 |
| 8447905 | Dynamic multi-level cache including resource access fairness scheme | Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Robert J. Sonnelitter, III | 2013-05-21 |
| 8447930 | Managing in-line store throughput reduction | Deanna Postles Dunn Berger, Michael Fee, Christine C. Jones, Robert J. Sonnelitter, III | 2013-05-21 |
| 8447932 | Recover store data merging | Deanna Postles Dunn Berger, Michael Fee, Christine C. Jones, Robert J. Sonnelitter, III | 2013-05-21 |
| 8392621 | Managing dataflow in a temporary memory | Ekaterina M. Ambroladze, Deanna Postles Dunn Berger, Michael Fee, Arthur J. O'Neill, Robert J. Sonnelitter, III | 2013-03-05 |
| 8090883 | Method, system and computer program product for enhanced shared store buffer management scheme with limited resources for optimized performance | Gary E. Strait, Mark A. Check, Hong Deng, Hanno Ulrich | 2012-01-03 |
| 7987400 | Method for optimizing scan chains in an integrated circuit that has multiple levels of hierarchy | Christopher J. Berry, Lawrence D. Curley, Patrick J. Meaney | 2011-07-26 |
| 7886089 | Method, system and computer program product for enhanced shared store buffer management scheme for differing buffer sizes with limited resources for optimized performance | Gary E. Strait, Mark A. Check, Hong Deng | 2011-02-08 |