Issued Patents All Time
Showing 25 most recent of 91 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12393399 | Controlling storage accesses for merge operations | Bruce C. Giamei, Donald W. Schmidt, Timothy J. Slegel, Aditya N. Puranik, Mark S. Farrell +3 more | 2025-08-19 |
| 12141076 | Translation support for a virtual cache | Markus Helms, Christian Jacobi, Ulrich Mayer, Johannes C. Reichart, Anthony Saporito +1 more | 2024-11-12 |
| 11892949 | Reducing cache transfer overhead in a system | Christian Zoellin, Christian Jacobi, Chung-Lung K. Shum, Anthony Saporito, Aaron Tsai | 2024-02-06 |
| 11775445 | Translation support for a virtual cache | Markus Helms, Christian Jacobi, Ulrich Mayer, Johannes C. Reichart, Anthony Saporito +1 more | 2023-10-03 |
| 11675899 | Hardware mitigation for Spectre and meltdown-like attacks | Christian Borntraeger, Jonathan D. Bradbury, Anthony Saporito | 2023-06-13 |
| 11586542 | Reducing cache transfer overhead in a system | Christian Zoellin, Christian Jacobi, Chung-Lung K. Shum, Anthony Saporito, Aaron Tsai | 2023-02-21 |
| 11586265 | Voltage droop management through microarchitectural stall events | Pradeep Bhadravati Parashurama, Alper Buyuktosunoglu, Ramon Bertran Monfort, Tobias Webel, Preetham M. Lobo +1 more | 2023-02-21 |
| 11403222 | Cache structure using a logical directory | Christian Jacobi, Ulrich Mayer, Anthony Saporito, Aaron Tsai | 2022-08-02 |
| 11281469 | Saving and restoring machine state between multiple executions of an instruction | Bruce C. Giamei, Donald W. Schmidt, Timothy J. Slegel, Aditya N. Puranik, Mark S. Farrell +3 more | 2022-03-22 |
| 11221850 | Sort and merge instruction for a general-purpose processor | Bruce C. Giamei, Donald W. Schmidt, Timothy Siegel, Aditya N. Puranik, Mark S. Farrell +3 more | 2022-01-11 |
| 11204881 | Computer system software/firmware and a processor unit with a security module | Angel Nunez Mencias, Jakob C. Lang, Ulrich Mayer | 2021-12-21 |
| 11099919 | Testing a data coherency algorithm | Christian Habermann, Gerrit Koch, Ralf Winkelmann | 2021-08-24 |
| 11074184 | Maintaining data order between buffers | Michael J. Cadigan, Jr., Erez Barak, Deepankar Bhattacharjee, Yair Fried, Jonathan T. Hsieh +1 more | 2021-07-27 |
| 11042356 | Tournament tree rollback for payload write exception | Aditya N. Puranik, Nidhi Chandak | 2021-06-22 |
| 11010298 | Reducing cache transfer overhead in a system | Christian Zoellin, Christian Jacobi, Chung-Lung K. Shum, Anthony Saporito, Aaron Tsai | 2021-05-18 |
| 11010307 | Cache management | Deanna Postles Dunn Berger, Christian Jacobi, Yossi Shapira, Aaron Tsai | 2021-05-18 |
| 10970214 | Selective downstream cache processing for data access | Willm Hinrichs, Markus Kaltenbach, Eyal Naor | 2021-04-06 |
| 10956328 | Selective downstream cache processing for data access | Willm Hinrichs, Markus Kaltenbach, Eyal Naor | 2021-03-23 |
| 10949351 | Bits register for synonyms in a memory system | Willm Hinrichs | 2021-03-16 |
| 10949212 | Saving and restoring machine state between multiple executions of an instruction | Bruce C. Giamei, Donald W. Schmidt, Timothy Siegel, Aditya N. Puranik, Mark S. Farrell +3 more | 2021-03-16 |
| 10831478 | Sort and merge instruction for a general-purpose processor | Bruce C. Giamei, Donald W. Schmidt, Timothy J. Slegel, Aditya N. Puranik, Mark S. Farrell +3 more | 2020-11-10 |
| 10831503 | Saving and restoring machine state between multiple executions of an instruction | Bruce C. Giamei, Donald W. Schmidt, Timothy J. Slegel, Aditya N. Puranik, Mark S. Farrell +3 more | 2020-11-10 |
| 10831502 | Migration of partially completed instructions | Bruce C. Giamei, Donald W. Schmidt, Timothy J. Slegel, Aditya N. Puranik, Mark S. Farrell +3 more | 2020-11-10 |
| 10831664 | Cache structure using a logical directory | Christian Jacobi, Ulrich Mayer, Anthony Saporito, Aaron Tsai | 2020-11-10 |
| 10831674 | Translation support for a virtual cache | Markus Helms, Christian Jacobi, Ulrich Mayer, Johannes C. Reichart, Anthony Saporito +1 more | 2020-11-10 |