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Branch prediction for indirect branch instructions |
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2021-08-24 |
| 11099919 |
Testing a data coherency algorithm |
Christian Habermann, Martin Recktenwald, Ralf Winkelmann |
2021-08-24 |
| 10896118 |
Determine soft error resilience while verifying architectural compliance |
Ophir Erez, Bodo Hoppe, Divya K. Joshi, Parminder Singh |
2021-01-19 |
| 10830818 |
Ensuring completeness of interface signal checking in functional verification |
Carsten Greiner, Minh Cuong Tran, Joerg Walter |
2020-11-10 |
| 10823782 |
Ensuring completeness of interface signal checking in functional verification |
Carsten Greiner, Minh Cuong Tran, Joerg Walter |
2020-11-03 |
| 10684857 |
Data prefetching that stores memory addresses in a first table and responsive to the occurrence of loads corresponding to the memory addresses stores the memory addresses in a second table |
Wolfgang Gellerich, Peter M. Held, Martin Schwidefsky |
2020-06-16 |
| 10678974 |
System and method for generation of an integrated circuit design |
Carsten Greiner, Johannes C. Reichart, Ralf Winkelmann |
2020-06-09 |
| 10635555 |
Verifying a graph-based coherency verification tool |
Thomas P. Grosser, Ralf Winkelmann |
2020-04-28 |
| 10572617 |
System and method for generation of an integrated circuit design |
Carsten Greiner, Johannes C. Reichart, Ralf Winkelmann |
2020-02-25 |
| 10558510 |
Testing a data coherency algorithm |
Christian Habermann, Martin Recktenwald, Ralf Winkelmann |
2020-02-11 |
| 10489296 |
Quality of cache management in a computer |
Wolfgang Gellerich, Peter M. Held, Christoph Raisch, Martin Schwidefsky |
2019-11-26 |
| 10318406 |
Determine soft error resilience while verifying architectural compliance |
Ophir Erez, Bodo Hoppe, Divya K. Joshi, Parminder Singh |
2019-06-11 |
| 10282265 |
Verifying a graph-based coherency verification tool |
Thomas P. Grosser, Ralf Winkelmann |
2019-05-07 |
| 9959155 |
Testing a data coherency algorithm |
Christian Habermann, Martin Recktenwald, Ralf Winkelmann |
2018-05-01 |
| 9934343 |
System and method for generation of an integrated circuit design |
Carsten Greiner, Johannes C. Reichart, Ralf Winkelmann |
2018-04-03 |
| 9928127 |
Testing a data coherency algorithm |
Christian Habermann, Martin Recktenwald, Ralf Winkelmann |
2018-03-27 |
| 9928321 |
System and method for generation of an integrated circuit design |
Carsten Greiner, Johannes C. Reichart, Ralf Winkelmann |
2018-03-27 |
| 9921906 |
Performing a repair operation in arrays |
Martin Recktenwald |
2018-03-20 |
| 9916195 |
Performing a repair operation in arrays |
Martin Recktenwald |
2018-03-13 |
| 9274959 |
Handling virtual memory address synonyms in a multi-level cache hierarchy structure |
Christian Habermann, Christian Jacobi, Martin Recktenwald, Hans-Werner Tast |
2016-03-01 |
| 9262626 |
Stack entry overwrite protection |
Joerg Deutschle, Wolfgang Gellerich, Bernhard Kick |
2016-02-16 |
| 9245110 |
Stack entry overwrite protection |
Joerg Deutschle, Wolfgang Gellerich, Bernhard Kick |
2016-01-26 |
| 9026968 |
Verification assistance for digital circuit designs |
Carsten Greiner, Juergen Ruf, Ken Werner |
2015-05-05 |
| 8977823 |
Store buffer for transactional memory |
Khary J. Alexander, Christian Jacobi, Martin Recktenwald, Timothy J. Slegel, Hans-Werner Tast |
2015-03-10 |
