Issued Patents All Time
Showing 1–25 of 53 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12393399 | Controlling storage accesses for merge operations | Bruce C. Giamei, Martin Recktenwald, Donald W. Schmidt, Timothy J. Slegel, Aditya N. Puranik +3 more | 2025-08-19 |
| 12223098 | Systems and methods for dynamic control of a secure mode of operation in a processor | Debapriya Chatterjee, Bradly G. Frey, Brian W. Thompto | 2025-02-11 |
| 11892949 | Reducing cache transfer overhead in a system | Christian Jacobi, Chung-Lung K. Shum, Martin Recktenwald, Anthony Saporito, Aaron Tsai | 2024-02-06 |
| 11797713 | Systems and methods for dynamic control of a secure mode of operation in a processor | Debapriya Chatterjee, Bradly G. Frey, Brian W. Thompto | 2023-10-24 |
| 11748104 | Microprocessor that fuses load and compare instructions | Bryan Lloyd, David A. Hrusecky, Sundeep Chadha, Dung Q. Nguyen, Brian W. Thompto +2 more | 2023-09-05 |
| 11593109 | Sharing instruction cache lines between multiple threads | Sheldon B. Levenstein, Nicholas R. Orzol, David Campbell | 2023-02-28 |
| 11593108 | Sharing instruction cache footprint between multiple threads | Sheldon B. Levenstein, Nicholas R. Orzol, David Campbell | 2023-02-28 |
| 11586542 | Reducing cache transfer overhead in a system | Christian Jacobi, Chung-Lung K. Shum, Martin Recktenwald, Anthony Saporito, Aaron Tsai | 2023-02-21 |
| 11416257 | Hybrid and aggregrate branch prediction system with a tagged branch orientation predictor for prediction override or pass-through | Naga P. Gorti, Ehsan Fatehi, Nicholas R. Orzol, Edmund J. Gieske | 2022-08-16 |
| 11392386 | Program counter (PC)-relative load and store addressing for fused instructions | Nicholas R. Orzol, Brian W. Thompto, Dung Q. Nguyen, Niels Fricke, Sheldon B. Levenstein +2 more | 2022-07-19 |
| 11327757 | Processor providing intelligent management of values buffered in overlaid architected and non-architected register files | Steven J. Battle, Kurt A. Feiste, Susan E. Eisen, Dung Q. Nguyen, Kent Li +4 more | 2022-05-10 |
| 11308277 | Memory preserving parse tree based compression with entropy coding | Jonathan D. Bradbury, Markus Helms, Christian Jacobi, Aditya N. Puranik | 2022-04-19 |
| 11281469 | Saving and restoring machine state between multiple executions of an instruction | Bruce C. Giamei, Martin Recktenwald, Donald W. Schmidt, Timothy J. Slegel, Aditya N. Puranik +3 more | 2022-03-22 |
| 11263398 | Memory preserving parse tree based compression with entropy coding | Jonathan D. Bradbury, Markus Helms, Christian Jacobi, Aditya N. Puranik | 2022-03-01 |
| 11249757 | Handling and fusing load instructions in a processor | Bryan Lloyd, Brian W. Thompto, Dung Q. Nguyen, Sheldon B. Levenstein, Brian D. Barrick | 2022-02-15 |
| 11221850 | Sort and merge instruction for a general-purpose processor | Bruce C. Giamei, Martin Recktenwald, Donald W. Schmidt, Timothy Siegel, Aditya N. Puranik +3 more | 2022-01-11 |
| 11163571 | Fusion to enhance early address generation of load instructions in a microprocessor | Brian D. Barrick, Sundeep Chadha, Sheldon B. Levenstein, Phillip G. Williams, Niels Fricke +2 more | 2021-11-02 |
| 11144319 | Redistribution of architected states for a processor register file | Steven J. Battle, Susan E. Eisen, Dung Q. Nguyen, Salma Ayub, Albert J. Van Norstrand, Jr. +2 more | 2021-10-12 |
| 11010298 | Reducing cache transfer overhead in a system | Christian Jacobi, Chung-Lung K. Shum, Martin Recktenwald, Anthony Saporito, Aaron Tsai | 2021-05-18 |
| 10983797 | Program instruction scheduling | Phillip G. Williams, Brian W. Thompto, Dung Q. Nguyen, Hung Q. Le, Jessica Hui-Chun Tseng +3 more | 2021-04-20 |
| 10956440 | Compressing a plurality of documents | Jochen Roehrig, Thomas H. Gnech, Steffen Koenig, Regina Illner, Oliver Petrik | 2021-03-23 |
| 10949212 | Saving and restoring machine state between multiple executions of an instruction | Bruce C. Giamei, Martin Recktenwald, Donald W. Schmidt, Timothy Siegel, Aditya N. Puranik +3 more | 2021-03-16 |
| 10936318 | Tagged indirect branch predictor (TIP) | Ehsan Fatehi, Naga P. Gorti, Nicholas R. Orzol | 2021-03-02 |
| 10831478 | Sort and merge instruction for a general-purpose processor | Bruce C. Giamei, Martin Recktenwald, Donald W. Schmidt, Timothy J. Slegel, Aditya N. Puranik +3 more | 2020-11-10 |
| 10831502 | Migration of partially completed instructions | Bruce C. Giamei, Martin Recktenwald, Donald W. Schmidt, Timothy J. Slegel, Aditya N. Puranik +3 more | 2020-11-10 |