Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11847458 | Thread priorities using misprediction rate and speculative depth | Richard J. Eickemeyer, John B. Griswell, Jr., Naga P. Gorti | 2023-12-19 |
| 11520591 | Flushing of instructions based upon a finish ratio and/or moving a flush point in a processor | Richard J. Eickemeyer, John B. Griswell, Jr. | 2022-12-06 |
| 11416257 | Hybrid and aggregrate branch prediction system with a tagged branch orientation predictor for prediction override or pass-through | Naga P. Gorti, Nicholas R. Orzol, Christian Zoellin, Edmund J. Gieske | 2022-08-16 |
| 11080060 | Preventing operand store compare conflicts using conflict address data tables | Brian W. Thompto, John B. Griswell, Jr. | 2021-08-03 |
| 10942743 | Splitting load hit store table for out-of-order processor | Richard J. Eickemeyer, Edmund J. Gieske | 2021-03-09 |
| 10936318 | Tagged indirect branch predictor (TIP) | Naga P. Gorti, Nicholas R. Orzol, Christian Zoellin | 2021-03-02 |
| 10824430 | Resolving operand store compare conflicts | Brian W. Thompto | 2020-11-03 |
| 10725783 | Splitting load hit store table for out-of-order processor | Richard J. Eickemeyer, Edmund J. Gieske | 2020-07-28 |
| 10402327 | Network-aware cache coherence protocol enhancement | David A. Roberts | 2019-09-03 |