Issued Patents All Time
Showing 25 most recent of 68 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11886883 | Dependency skipping in a load-compare-jump sequence of instructions by incorporating compare functionality into the jump instruction and auto-finishing the compare instruction | Nicholas R. Orzol, Mehul Patel, Dung Q. Nguyen, Brian D. Barrick, John B. Griswell, Jr. +3 more | 2024-01-30 |
| 11868773 | Inferring future value for speculative branch resolution in a microprocessor | Steven J. Battle, Brian D. Barrick, Dung Q. Nguyen, John B. Griswell, Jr., Balaram Sinharoy +2 more | 2024-01-09 |
| 11847458 | Thread priorities using misprediction rate and speculative depth | Ehsan Fatehi, John B. Griswell, Jr., Naga P. Gorti | 2023-12-19 |
| 11709676 | Inferring future value for speculative branch resolution | Steven J. Battle, Brian D. Barrick, Dung Q. Nguyen, John B. Griswell, Jr., Balaram Sinharoy +2 more | 2023-07-25 |
| 11663013 | Dependency skipping execution | Nicholas R. Orzol, Mehul Patel, Dung Q. Nguyen, Brian D. Barrick, John B. Griswell, Jr. +3 more | 2023-05-30 |
| 11520591 | Flushing of instructions based upon a finish ratio and/or moving a flush point in a processor | Ehsan Fatehi, John B. Griswell, Jr. | 2022-12-06 |
| 10942743 | Splitting load hit store table for out-of-order processor | Ehsan Fatehi, Edmund J. Gieske | 2021-03-09 |
| 10915446 | Prefetch confidence and phase prediction for improving prefetch performance in bandwidth constrained scenarios | John B. Griswell, Jr., Mohit Karve | 2021-02-09 |
| 10795683 | Predicting indirect branches using problem branch filtering and pattern cache | Tejas Karkhanis, Brian R. Konigsburg, David S. Levitan, Douglas R. G. Logan, Mauricio J. Serrano | 2020-10-06 |
| 10725783 | Splitting load hit store table for out-of-order processor | Ehsan Fatehi, Edmund J. Gieske | 2020-07-28 |
| 10664279 | Instruction prefetching in a computer processor using a prefetch prediction vector | Sheldon B. Levenstein, David S. Levitan, Mauricio J. Serrano | 2020-05-26 |
| 10387162 | Effective address table with multiple taken branch handling for out-of-order processors | Balaram Sinharoy | 2019-08-20 |
| 10379857 | Dynamic sequential instruction prefetching | Sheldon B. Levenstein, David S. Levitan, Mauricio J. Serrano, Brian W. Thompto | 2019-08-13 |
| 10353710 | Techniques for predicting a target address of an indirect branch instruction | Naga P. Gorti, David S. Levitan, Albert J. Van Norstrand, Jr. | 2019-07-16 |
| 10209995 | Processor core including pre-issue load-hit-store (LHS) hazard prediction to reduce rejection of load instructions | Sundeep Chadha, John B. Griswell, Jr., Dung Q. Nguyen | 2019-02-19 |
| 10191847 | Prefetch performance | Bernard C. Drerup, Guy L. Guthrie, Mohit Karve, George W. Rohrbaugh, III, Brian W. Thompto | 2019-01-29 |
| 10191845 | Prefetch performance | Bernard C. Drerup, Guy L. Guthrie, Mohit Karve, George W. Rohrbaugh, III, Brian W. Thompto | 2019-01-29 |
| 10175987 | Instruction prefetching in a computer processor using a prefetch prediction vector | Sheldon B. Levenstein, David S. Levitan, Mauricio J. Serrano | 2019-01-08 |
| 10078514 | Techniques for dynamic sequential instruction prefetching | Sheldon B. Levenstein, David S. Levitan, Mauricio J. Serrano, Brian W. Thompto | 2018-09-18 |
| 10042647 | Managing a divided load reorder queue | David A. Hrusecky, Elizabeth A. McGlone, Brian W. Thompto, Albert J. Van Norstrand, Jr. | 2018-08-07 |
| 9916245 | Accessing partial cachelines in a data cache | Kimberly M. Fernsler, Guy L. Guthrie, David A. Hrusecky, Elizabeth A. McGlone | 2018-03-13 |
| 9524166 | Tracking long GHV in high performance out-of-order superscalar processors | Tejas Karkhanis, Brian R. Konigsburg, David S. Levitan, Douglas R. G. Logan, Jose E. Moreira +1 more | 2016-12-20 |
| 9465744 | Data prefetch ramp implemenation based on memory utilization | Jason N. Dale, Miles Robert Dooley, John B. Griswell, Jr., Francis Patrick O'Connell, Jeffrey A. Stuecheli | 2016-10-11 |
| 9442736 | Techniques for selecting a predicted indirect branch address from global and local caches | Tejas Karkhanis, Brian R. Konigsburg, David S. Levitan, Douglas R. G. Logan | 2016-09-13 |
| 8856453 | Persistent prefetch data stream settings | Jason N. Dale, Miles Robert Dooley, Bradly G. Frey, Yaoqing Gao, Francis Patrick O'Connell +1 more | 2014-10-07 |