Issued Patents All Time
Showing 25 most recent of 57 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12210908 | Routing instructions in a microprocessor | Brian W. Thompto, Michael J. Genden, Tharunachalam Pindicura, Kent Li, Nir Segev +1 more | 2025-01-28 |
| 11748104 | Microprocessor that fuses load and compare instructions | Bryan Lloyd, David A. Hrusecky, Sundeep Chadha, Dung Q. Nguyen, Christian Zoellin +2 more | 2023-09-05 |
| 11392386 | Program counter (PC)-relative load and store addressing for fused instructions | Nicholas R. Orzol, Christian Zoellin, Brian W. Thompto, Dung Q. Nguyen, Niels Fricke +2 more | 2022-07-19 |
| 11163571 | Fusion to enhance early address generation of load instructions in a microprocessor | Brian D. Barrick, Sundeep Chadha, Sheldon B. Levenstein, Niels Fricke, Dung Q. Nguyen +2 more | 2021-11-02 |
| 10997075 | Adaptively enabling and disabling snooping bus commands | Guy L. Guthrie, Hien Minh Le, Hugh Shen, Derek E. Williams | 2021-05-04 |
| 10983797 | Program instruction scheduling | Christian Zoellin, Brian W. Thompto, Dung Q. Nguyen, Hung Q. Le, Jessica Hui-Chun Tseng +3 more | 2021-04-20 |
| 10649853 | Tracking modifications to a virtual machine image that occur during backup of the virtual machine | Guy L. Guthrie, Naresh Nayar, Geraint North, Hugh Shen, William J. Starke | 2020-05-12 |
| 10649901 | Victim cache line selection | Bernard C. Drerup, Guy L. Guthrie, Jeffrey A. Stuecheli | 2020-05-12 |
| 10613940 | Tracking modifications to a virtual machine image that occur during backup of the virtual machine | Guy Lynn Gutherie, Naresh Nayar, Geraint North, Hugh Shen, William J. Starke | 2020-04-07 |
| 10467008 | Identifying an effective address (EA) using an interrupt instruction tag (ITAG) in a multi-slice processor | David S. Levitan, Mehul Patel, Albert J. Van Norstrand, Jr. | 2019-11-05 |
| 10437756 | Operation of a multi-slice processor implementing datapath steering | Steven R. Carlough, Kurt A. Feiste, Brian W. Thompto | 2019-10-08 |
| 10417152 | Operation of a multi-slice processor implementing datapath steering | Steven R. Carlough, Kurt A. Feiste, Brian W. Thompto | 2019-09-17 |
| 10387154 | Thread migration using a microcode engine of a multi-slice processor | James Wilson Bishop, Marcy E. Byers, Steven R. Carlough, Paul M. Kennedy, Albert J. Van Norstrand, Jr. | 2019-08-20 |
| 10346255 | Method for flagging data modification during a virtual machine backup | Guy L. Guthrie, Naresh Nayar, Geraint North, Hugh Shen, William J. Starke | 2019-07-09 |
| 10339009 | System for flagging data modification during a virtual machine backup | Guy L. Guthrie, Naresh Nayar, Geraint North, Hugh Shen, William J. Starke | 2019-07-02 |
| 10331563 | Adaptively enabling and disabling snooping bus commands | Guy L. Guthrie, Hien Minh Le, Hugh Shen, Derek E. Williams | 2019-06-25 |
| 10152385 | Virtual machine backup | Guy L. Guthrie, Naresh Nayar, Geraint North, Hugh Shen, William J. Starke | 2018-12-11 |
| 10133641 | Tracking modifications to a virtual machine image that occur during backup of the virtual machine | Guy L. Guthrie, Naresh Nayar, Geraint North, Hugh Shen, William J. Starke | 2018-11-20 |
| 10120683 | Supporting even instruction tag (‘ITAG’) requirements in a multi-slice processor using null internal operations (IOPs) | Steven R. Carlough, Kurt A. Feiste, Paul M. Kennedy | 2018-11-06 |
| 10108498 | Virtual machine backup | Guy L. Guthrie, Naresh Nayar, Geraint North, Hugh Shen, William J. Starke | 2018-10-23 |
| 9886350 | Tracking modifications to a virtual machine image that occur during backup of the virtual machine | Guy L. Guthrie, Naresh Nayar, Geraint North, Hugh Shen, William J. Starke | 2018-02-06 |
| 9880905 | Tracking modifications to a virtual machine image that occur during backup of the virtual machine | Guy L. Guthrie, Naresh Nayar, Geraint North, Hugh Shen, William J. Starke | 2018-01-30 |
| 9858188 | Adaptively enabling and disabling snooping fastpath commands | Guy L. Guthrie, Hien Minh Le, Hugh Shen, Derek E. Williams | 2018-01-02 |
| 9753862 | Hybrid replacement policy in a multilevel cache memory hierarchy | Bernard C. Drerup, Guy L. Guthrie, Jeffrey A. Stuecheli | 2017-09-05 |
| 9529717 | Preserving an invalid global domain indication when installing a shared cache line in a cache | Guy L. Guthrie, Hien Minh Le, Jeffrey A. Stuecheli | 2016-12-27 |