Issued Patents All Time
Showing 25 most recent of 26 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12204902 | Routing instruction results to a register block of a subdivided register file based on register block utilization rate | Kurt A. Feiste, Brian W. Thompto, Susan E. Eisen, Dung Q. Nguyen | 2025-01-21 |
| 12061909 | Parallel slice processor having a recirculating load-store queue for fast deallocation of issue queue entries | Sundeep Chadha, Robert A. Cordes, David A. Hrusecky, Hung Q. Le, Dung Q. Nguyen +1 more | 2024-08-13 |
| 11941398 | Fast mapper restore for flush in processor | Brian D. Barrick, Steven J. Battle, Dung Q. Nguyen, Susan E. Eisen, Cliff Kucharski | 2024-03-26 |
| 11734010 | Parallel slice processor having a recirculating load-store queue for fast deallocation of issue queue entries | Sundeep Chadha, Robert A. Cordes, David A. Hrusecky, Hung Q. Le, Dung Q. Nguyen +1 more | 2023-08-22 |
| 11561794 | Evicting and restoring information using a single port of a logical register mapper and history buffer in a microprocessor comprising multiple main register file entries mapped to one accumulator register file entry | Steven J. Battle, Brian W. Thompto, Dung Q. Nguyen, Cliff Kucharski, Susan E. Eisen | 2023-01-24 |
| 11531548 | Fast perfect issue of dependent instructions in a distributed issue queue system | Brian D. Barrick, Dung Q. Nguyen, Brian W. Thompto, Tu-An T. Nguyen | 2022-12-20 |
| 11360779 | Logical register recovery within a processor | Steven J. Battle, Brian D. Barrick, Joshua W. Bowman, Susan E. Eisen, Brandon Goddard +2 more | 2022-06-14 |
| 11188332 | System and handling of register data in processors | Steven J. Battle, Brian D. Barrick, Joshua W. Bowman, Susan E. Eisen, Brandon Goddard +2 more | 2021-11-30 |
| 11150907 | Parallel slice processor having a recirculating load-store queue for fast deallocation of issue queue entries | Sundeep Chadha, Robert A. Cordes, David A. Hrusecky, Hung Q. Le, Dung Q. Nguyen +1 more | 2021-10-19 |
| 11144319 | Redistribution of architected states for a processor register file | Steven J. Battle, Susan E. Eisen, Dung Q. Nguyen, Albert J. Van Norstrand, Jr., Kent Li +2 more | 2021-10-12 |
| 11068267 | High bandwidth logical register flush recovery | Steven J. Battle, Brandon Goddard, Dung Q. Nguyen, Joshua W. Bowman, Brian D. Barrick +2 more | 2021-07-20 |
| 10949213 | Logical register recovery within a processor | Steven J. Battle, Brian D. Barrick, Joshua W. Bowman, Susan E. Eisen, Brandon Goddard +2 more | 2021-03-16 |
| 10942745 | Fast multi-width instruction issue in parallel slice processor | Jeffrey C. Brownscheidle, Sundeep Chadha, Dung Q. Nguyen, Tu-An T. Nguyen, Salim A. Shah +1 more | 2021-03-09 |
| 10831492 | Most favored branch issue | Glenn O. Kincaid, Christopher M. Mueller, Dung Q. Nguyen, Eula Faye Abalos Tolentino, Albert J. Van Norstrand, Jr. +1 more | 2020-11-10 |
| 10740107 | Operation of a multi-slice processor implementing load-hit-store handling | Joshua W. Bowman, Jeffrey C. Brownscheidle, Kurt A. Feiste, Dung Q. Nguyen, Salim A. Shah +1 more | 2020-08-11 |
| 10649779 | Variable latency pipe for interleaving instruction tags in a microprocessor | Josh Bowman, Sundeep Chadha, Dhivya Jeganathan, Cliff Kucharski, Dung Q. Nguyen | 2020-05-12 |
| 10613868 | Variable latency pipe for interleaving instruction tags in a microprocessor | Josh Bowman, Sundeep Chadha, Dhivya Jeganathan, Cliff Kucharski, Dung Q. Nguyen | 2020-04-07 |
| 10445100 | Broadcasting messages between execution slices for issued instructions indicating when execution results are ready | Joshua W. Bowman, Jeffrey C. Brownscheidle, Sundeep Chadha, Dhivya Jeganathan, Dung Q. Nguyen +2 more | 2019-10-15 |
| 10255071 | Method and apparatus for managing a speculative transaction in a processing unit | Susan E. Eisen, Glenn O. Kincaid, Cliff Kucharski, Christopher M. Mueller, Dung Q. Nguyen +1 more | 2019-04-09 |
| 10248421 | Operation of a multi-slice processor with reduced flush and restore latency | Brian D. Barrick, Joshua W. Bowman, Sundeep Chadha, Cliff Kucharski, Dung Q. Nguyen +2 more | 2019-04-02 |
| 10241790 | Operation of a multi-slice processor with reduced flush and restore latency | Brian D. Barrick, Joshua W. Bowman, Sundeep Chadha, Cliff Kucharski, Dung Q. Nguyen +2 more | 2019-03-26 |
| 10133576 | Parallel slice processor having a recirculating load-store queue for fast deallocation of issue queue entries | Sundeep Chadha, Robert A. Cordes, David A. Hrusecky, Hung Q. Le, Dung Q. Nguyen +1 more | 2018-11-20 |
| 10120693 | Fast multi-width instruction issue in parallel slice processor | Jeffrey C. Brownscheidle, Sundeep Chadha, Dung Q. Nguyen, Tu-An T. Nguyen, Salim A. Shah +1 more | 2018-11-06 |
| 9996359 | Fast multi-width instruction issue in parallel slice processor | Jeffrey C. Brownscheidle, Sundeep Chadha, Dung Q. Nguyen, Tu-An T. Nguyen, Salim A. Shah +1 more | 2018-06-12 |
| 9747217 | Distributed history buffer flush and restore handling in a parallel slice design | Sundeep Chadha, Michael J. Genden, Cliff Kucharski, Dung Q. Nguyen, David R. Terry | 2017-08-29 |