Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11150909 | Energy efficient source operand issue | Sundeep Chadha, Maureen A. Delaney, Dung Q. Nguyen | 2021-10-19 |
| 10942745 | Fast multi-width instruction issue in parallel slice processor | Salma Ayub, Sundeep Chadha, Dung Q. Nguyen, Tu-An T. Nguyen, Salim A. Shah +1 more | 2021-03-09 |
| 10776122 | Prioritization protocols of conditional branch instructions | Michael J. Genden, Eula Faye Abalos Tolentino, Dung Q. Nguyen, Tu-An T. Nguyen, David S. Walder | 2020-09-15 |
| 10740107 | Operation of a multi-slice processor implementing load-hit-store handling | Salma Ayub, Joshua W. Bowman, Kurt A. Feiste, Dung Q. Nguyen, Salim A. Shah +1 more | 2020-08-11 |
| 10719056 | Merging status and control data in a reservation station | Brian D. Barrick, Joshua W. Bowman, Sundeep Chadha, Michael J. Genden, Dhivya Jeganathan +2 more | 2020-07-21 |
| 10445100 | Broadcasting messages between execution slices for issued instructions indicating when execution results are ready | Salma Ayub, Joshua W. Bowman, Sundeep Chadha, Dhivya Jeganathan, Dung Q. Nguyen +2 more | 2019-10-15 |
| 10318294 | Operation of a multi-slice processor implementing dependency accumulation instruction sequencing | Khandker N. Adeeb, Joshua W. Bowman, Brandon Goddard, Dung Q. Nguyen, Tu-An T. Nguyen +2 more | 2019-06-11 |
| 10223125 | Linkable issue queue parallel execution slice processing method | Sundeep Chadha, Maureen A. Delaney, Hung Q. Le, Dung Q. Nguyen, Brian W. Thompto | 2019-03-05 |
| 10133581 | Linkable issue queue parallel execution slice for a processor | Sundeep Chadha, Maureen A. Delaney, Hung Q. Le, Dung Q. Nguyen, Brian W. Thompto | 2018-11-20 |
| 10120693 | Fast multi-width instruction issue in parallel slice processor | Salma Ayub, Sundeep Chadha, Dung Q. Nguyen, Tu-An T. Nguyen, Salim A. Shah +1 more | 2018-11-06 |
| 10078516 | Techniques to wake-up dependent instructions for back-to-back issue in a microprocessor | Sundeep Chadha, Maureen A. Delaney, Dung Q. Nguyen | 2018-09-18 |
| 10031757 | Operation of a multi-slice processor implementing a mechanism to overcome a system hang | Sundeep Chadha, Maureen A. Delaney, Dhivya Jeganathan, Dung Q. Nguyen, Salim A. Shah | 2018-07-24 |
| 9996359 | Fast multi-width instruction issue in parallel slice processor | Salma Ayub, Sundeep Chadha, Dung Q. Nguyen, Tu-An T. Nguyen, Salim A. Shah +1 more | 2018-06-12 |
| 9983879 | Operation of a multi-slice processor implementing dynamic switching of instruction issuance order | Sundeep Chadha, Maureen A. Delaney, Dhivya Jeganathan, Dung Q. Nguyen, Salim A. Shah | 2018-05-29 |
| 9971600 | Techniques to wake-up dependent instructions for back-to-back issue in a microprocessor | Sundeep Chadha, Maureen A. Delaney, Dung Q. Nguyen | 2018-05-15 |
| 9965286 | Age based fast instruction issue | Sundeep Chadha, Maureen A. Delaney, Dung Q. Nguyen | 2018-05-08 |
| 9880850 | Age based fast instruction issue | Sundeep Chadha, Maureen A. Delaney, Dung Q. Nguyen | 2018-01-30 |
| 9870231 | Age based fast instruction issue | Sundeep Chadha, Maureen A. Delaney, Dung Q. Nguyen | 2018-01-16 |
| 9389870 | Age based fast instruction issue | Sundeep Chadha, Maureen A. Delaney, Dung Q. Nguyen | 2016-07-12 |
| 9367322 | Age based fast instruction issue | Sundeep Chadha, Maureen A. Delaney, Dung Q. Nguyen | 2016-06-14 |
| 8489863 | Processor including age tracking of issue queue instructions | James Wilson Bishop, Mary D. Brown, Robert A. Cordes, Maureen A. Delaney, Jafar Nahidi +2 more | 2013-07-16 |
| 8380964 | Processor including age tracking of issue queue instructions | James Wilson Bishop, Mary D. Brown, Robert A. Cordes, Maureen A. Delaney, Jafar Nahidi +2 more | 2013-02-19 |