| 11403109 |
Steering a history buffer entry to a specific recovery port during speculative flush recovery lookup in a processor |
Steven J. Battle, Brian D. Barrick, Joshua W. Bowman, Susan E. Eisen, Brandon Goddard +2 more |
2022-08-02 |
| 10956158 |
System and handling of register data in processors |
Steven J. Battle, Brian D. Barrick, Joshua W. Bowman, Thao T. Doan, Susan E. Eisen +2 more |
2021-03-23 |
| 10740140 |
Flush-recovery bandwidth in a processor |
Steven J. Battle, Brian D. Barrick, Joshua W. Bowman, Susan E. Eisen, Brandon Goddard +2 more |
2020-08-11 |
| 10318294 |
Operation of a multi-slice processor implementing dependency accumulation instruction sequencing |
Joshua W. Bowman, Jeffrey C. Brownscheidle, Brandon Goddard, Dung Q. Nguyen, Tu-An T. Nguyen +2 more |
2019-06-11 |
| 10127121 |
Operation of a multi-slice processor implementing adaptive failure state capture |
Steven J. Battle, Brandon Goddard, Dung Q. Nguyen, Tu-An T. Nguyen, Nicholas R. Orzol +2 more |
2018-11-13 |
| 10037259 |
Adaptive debug tracing for microprocessors |
Steven J. Battle, Brandon Goddard, Dung Q. Nguyen, Tu-An T. Nguyen, Nicholas R. Orzol +2 more |
2018-07-31 |
