Issued Patents All Time
Showing 25 most recent of 28 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12061909 | Parallel slice processor having a recirculating load-store queue for fast deallocation of issue queue entries | Salma Ayub, Sundeep Chadha, David A. Hrusecky, Hung Q. Le, Dung Q. Nguyen +1 more | 2024-08-13 |
| 11734010 | Parallel slice processor having a recirculating load-store queue for fast deallocation of issue queue entries | Salma Ayub, Sundeep Chadha, David A. Hrusecky, Hung Q. Le, Dung Q. Nguyen +1 more | 2023-08-22 |
| 11520704 | Writing store data of multiple store operations into a cache line in a single cycle | Bryan Lloyd | 2022-12-06 |
| 11379241 | Handling oversize store to load forwarding in a processor | Bryan Lloyd, Brian Chen, Kimberly M. Fernsler, David A. Hrusecky | 2022-07-05 |
| 11263151 | Dynamic translation lookaside buffer (TLB) invalidation using virtually tagged cache for load/store operations | David Campbell, Bryan Lloyd, David A. Hrusecky, Kimberly M. Fernsler, Jeffrey A. Stuecheli +4 more | 2022-03-01 |
| 11243773 | Area and power efficient mechanism to wakeup store-dependent loads according to store drain merges | Bryan Lloyd, David Campbell, Brian Chen | 2022-02-08 |
| 11150907 | Parallel slice processor having a recirculating load-store queue for fast deallocation of issue queue entries | Salma Ayub, Sundeep Chadha, David A. Hrusecky, Hung Q. Le, Dung Q. Nguyen +1 more | 2021-10-19 |
| 10884742 | Handling unaligned load operations in a multi-slice computer processor | Sundeep Chadha, David A. Hrusecky, Hung Q. Le, Jentje Leenstra, Dung Q. Nguyen +2 more | 2021-01-05 |
| 10831481 | Handling unaligned load operations in a multi-slice computer processor | Sundeep Chadha, David A. Hrusecky, Hung Q. Le, Jentje Leenstra, Dung Q. Nguyen +2 more | 2020-11-10 |
| 10761854 | Preventing hazard flushes in an instruction sequencing unit of a multi-slice processor | David A. Hrusecky, Elizabeth A. McGlone | 2020-09-01 |
| 10496406 | Handling unaligned load operations in a multi-slice computer processor | Sundeep Chadha, David A. Hrusecky, Hung Q. Le, Jentje Leenstra, Dung Q. Nguyen +2 more | 2019-12-03 |
| 10409598 | Handling unaligned load operations in a multi-slice computer processor | Sundeep Chadha, David A. Hrusecky, Hung Q. Le, Jentje Leenstra, Dung Q. Nguyen +2 more | 2019-09-10 |
| 10268518 | Operation of a multi-slice processor implementing a load/store unit maintaining rejected instructions | Sundeep Chadha, David A. Hrusecky, Hung Q. Le, Elizabeth A. McGlone | 2019-04-23 |
| 10255107 | Operation of a multi-slice processor implementing a load/store unit maintaining rejected instructions | Sundeep Chadha, David A. Hrusecky, Hung Q. Le, Elizabeth A. McGlone | 2019-04-09 |
| 10223266 | Extended store forwarding for store misses without cache allocate | Hung Q. Le, Brian W. Thompto | 2019-03-05 |
| 10169046 | Out-of-order processor that avoids deadlock in processing queues by designating a most favored instruction | Maarten J. Boersma, David A. Hrusecky, Jennifer L. Molnar, Brian W. Thompto, Albert J. Van Norstrand, Jr. +1 more | 2019-01-01 |
| 10133576 | Parallel slice processor having a recirculating load-store queue for fast deallocation of issue queue entries | Salma Ayub, Sundeep Chadha, David A. Hrusecky, Hung Q. Le, Dung Q. Nguyen +1 more | 2018-11-20 |
| 10073697 | Handling unaligned load operations in a multi-slice computer processor | Sundeep Chadha, David A. Hrusecky, Hung Q. Le, Jentje Leenstra, Dung Q. Nguyen +2 more | 2018-09-11 |
| 10067763 | Handling unaligned load operations in a multi-slice computer processor | Sundeep Chadha, David A. Hrusecky, Hung Q. Le, Jentje Leenstra, Dung Q. Nguyen +2 more | 2018-09-04 |
| 10042770 | Operation of a multi-slice processor implementing a load/store unit maintaining rejected instructions | Sundeep Chadha, David A. Hrusecky, Hung Q. Le, Elizabeth A. McGlone | 2018-08-07 |
| 10037229 | Operation of a multi-slice processor implementing a load/store unit maintaining rejected instructions | Sundeep Chadha, David A. Hrusecky, Hung Q. Le, Elizabeth A. McGlone | 2018-07-31 |
| 9940133 | Operation of a multi-slice processor implementing simultaneous two-target loads and stores | David A. Hrusecky, Jennifer L. Molnar, Jose Angel Paredes, Brian W. Thompto | 2018-04-10 |
| 9934033 | Operation of a multi-slice processor implementing simultaneous two-target loads and stores | David A. Hrusecky, Jennifer L. Molnar, Jose Angel Paredes, Brian W. Thompto | 2018-04-03 |
| 9798549 | Out-of-order processor that avoids deadlock in processing queues by designating a most favored instruction | Maarten J. Boersma, David A. Hrusecky, Jennifer L. Molnar, Brian W. Thompto, Albert J. Van Norstrand, Jr. +1 more | 2017-10-24 |
| 8489863 | Processor including age tracking of issue queue instructions | James Wilson Bishop, Mary D. Brown, Jeffrey C. Brownscheidle, Maureen A. Delaney, Jafar Nahidi +2 more | 2013-07-16 |