Issued Patents All Time
Showing 1–25 of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10176038 | Partial ECC mechanism for a byte-write capable register | Dhivya Jeganathan, Dung Q. Nguyen, David R. Terry, Brian W. Thompto | 2019-01-08 |
| 9985656 | Generating ECC values for byte-write capable registers | Dhivya Jeganathan, Dung Q. Nguyen, David R. Terry, Brian W. Thompto | 2018-05-29 |
| 9985655 | Generating ECC values for byte-write capable registers | Dhivya Jeganathan, Dung Q. Nguyen, David R. Terry, Brian W. Thompto | 2018-05-29 |
| 9940133 | Operation of a multi-slice processor implementing simultaneous two-target loads and stores | Robert A. Cordes, David A. Hrusecky, Jennifer L. Molnar, Brian W. Thompto | 2018-04-10 |
| 9934033 | Operation of a multi-slice processor implementing simultaneous two-target loads and stores | Robert A. Cordes, David A. Hrusecky, Jennifer L. Molnar, Brian W. Thompto | 2018-04-03 |
| 9766975 | Partial ECC handling for a byte-write capable register | Dhivya Jeganathan, Dung Q. Nguyen, David R. Terry, Brian W. Thompto | 2017-09-19 |
| 9229524 | Performing local power gating in a processor | Nadav Bonen, Ron Gabor, Zeev Sperber, Vjekoslav Svilan, David N. Mackintosh +2 more | 2016-01-05 |
| 7827443 | Processor instruction retry recovery | Susan E. Eisen, Hung Q. Le, Michael J. Mack, Dung Q. Nguyen, Scott Barnett Swaney | 2010-11-02 |
| 7683662 | Method and apparatus for implementing complex logic within a memory array | Andrew James Bianchi | 2010-03-23 |
| 7679973 | Register file | Sam Gat-Shang Chu, Saiful Islam, Shelton Siuwah Leung | 2010-03-16 |
| 7561489 | System and method of selective row energization based on write data | Michael Ju Hyeok Lee, Peter Juergen Klim, Sam Gat-Shang Chu | 2009-07-14 |
| 7506230 | Transient noise detection scheme and apparatus | Sam Gat-Shang Chu, Peter Juergen Klim, Michael Ju Hyeok Lee | 2009-03-17 |
| 7478276 | Method for checkpointing instruction groups with out-of-order floating point instructions in a multi-threaded processor | James Wilson Bishop, Hung Q. Le, Michael J. Mack, Jafar Nahidi, Dung Q. Nguyen +2 more | 2009-01-13 |
| 7471103 | Method for implementing complex logic within a memory array | Andrew James Bianchi | 2008-12-30 |
| 7467325 | Processor instruction retry recovery | Susan E. Eisen, Hung Q. Le, Michael J. Mack, Dung Q. Nguyen, Scott Barnett Swaney | 2008-12-16 |
| 7443737 | Register file | Sam Gat-Shang Chu, Saiful Islam, Shelton Siuwah Leung | 2008-10-28 |
| 7379348 | System and method of selective row energization based on write data | Michael Ju Hyeok Lee, Peter Juergen Klim, Sam Gat-Shang Chu | 2008-05-27 |
| 7202704 | Leakage sensing and keeper circuit for proper operation of a dynamic circuit | Sam Gat-Shang Chu, Peter Juergen Klim, Michael Ju Hyeok Lee | 2007-04-10 |
| 7142463 | Register file method incorporating read-after-write blocking using detection cells | Sam Gat-Shang Chu, Peter Juergen Klim, Michael Ju Hyeok Lee | 2006-11-28 |
| 7116569 | Method and apparatus for selecting operating characteristics of a content addressable memory by using a compare mask | Joaquin Hinojosa, Eric Jason Fluhr, Michael Ju Hyeok Lee, Ed Seewann | 2006-10-03 |
| 7085896 | Method and apparatus which implements a multi-ported LRU in a multiple-clock system | Andrew James Bianchi | 2006-08-01 |
| 7073106 | Test method for guaranteeing full stuck-at-fault coverage of a memory array | Philip G. Shephard, III, Timothy M. Skergan, Neil Ray Vanderschaaf | 2006-07-04 |
| 7015723 | Dynamic-static logical control element for signaling an interval between the end of a control signal and a logical evaluation | Sam Gat-Shang Chu, Peter Juergen Klim, Michael Ju Hyeok Lee | 2006-03-21 |
| 7012839 | Register file apparatus and method incorporating read-after-write blocking using detection cells | Sam Gat-Shang Chu, Peter Juergen Klim, Michael Ju Hyeok Lee | 2006-03-14 |
| 7002860 | Multilevel register-file bit-read method and apparatus | Sam Gat-Shang Chu, Peter Juergen Klim, Michael Ju Hyeok Lee | 2006-02-21 |