Issued Patents All Time
Showing 1–25 of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11908519 | Pre-compare operation for compact low-leakage dual-compare cam cell | Hema Ramamurthy | 2024-02-20 |
| 11837289 | Compact low-leakage multi-bit compare CAM cell | Hema Ramamurthy | 2023-12-05 |
| 9704568 | Reducing SRAM power using strategic data pattern storage | Geoffrey Wang | 2017-07-11 |
| 9042149 | Volatile memory access via shared bitlines | Bao G. Truong | 2015-05-26 |
| 8375172 | Preventing fast read before write in static random access memory arrays | Eddie K. Chan, Ricardo H. Nigaglioni, Bao G. Truong | 2013-02-12 |
| 8237481 | Low power programmable clock delay generator with integrated decode function | Yuen H. Chan, Rolf Sautter, Juergen Pille | 2012-08-07 |
| 8014215 | Cache array power savings through a design structure for valid bit detection | Bao G. Truong, Samuel I. Ward | 2011-09-06 |
| 7936198 | Progamable control clock circuit for arrays | Rolf Sautter, Yuen H. Chan, Juergen Pille | 2011-05-03 |
| 7936638 | Enhanced programmable pulsewidth modulating circuit for array clock generation | Yuen H. Chan, Rolf Sautter, Tobias Werner | 2011-05-03 |
| 7813189 | Array data input latch and data clocking scheme | Yuen H. Chan, Elspeth Anne Huston | 2010-10-12 |
| 7804728 | Information handling system with SRAM precharge power conservation | Bao G. Truong | 2010-09-28 |
| 7788443 | Transparent multi-hit correction in associative memories | Vinod Ramadurai, Bao G. Truong | 2010-08-31 |
| 7788444 | Multi-hit detection in associative memories | Bao G. Truong | 2010-08-31 |
| 7613944 | Programmable local clock buffer capable of varying initial settings | Yuen H. Chan | 2009-11-03 |
| 7561489 | System and method of selective row energization based on write data | Jose Angel Paredes, Peter Juergen Klim, Sam Gat-Shang Chu | 2009-07-14 |
| 7552413 | System and computer program for verifying performance of an array by simulating operation of edge cells in a full array model | Vikas Agarwal, Philip G. Shephard, III | 2009-06-23 |
| 7506230 | Transient noise detection scheme and apparatus | Sam Gat-Shang Chu, Peter Juergen Klim, Jose Angel Paredes | 2009-03-17 |
| 7468929 | Apparatus for SRAM array power reduction through majority evaluation | Bao G. Truong | 2008-12-23 |
| 7466647 | Efficient muxing scheme to allow for bypass and array access | Andrew James Bianchi, Eric Jason Fluhr, Masood Ahmed Khan, Edelmar Seewann | 2008-12-16 |
| 7424691 | Method for verifying performance of an array by simulating operation of edge cells in a full array model | Vikas Agarwal, Philip G. Shephard, III | 2008-09-09 |
| 7379348 | System and method of selective row energization based on write data | Jose Angel Paredes, Peter Juergen Klim, Sam Gat-Shang Chu | 2008-05-27 |
| 7304352 | Alignment insensitive D-cache cell | K. Paul Muller, Kevin A. Batson | 2007-12-04 |
| 7283404 | Content addressable memory including a dual mode cycle boundary latch | Masood Ahmed Khan, Ed Seewann | 2007-10-16 |
| 7202704 | Leakage sensing and keeper circuit for proper operation of a dynamic circuit | Sam Gat-Shang Chu, Peter Juergen Klim, Jose Angel Paredes | 2007-04-10 |
| 7167385 | Method and apparatus for controlling the timing of precharge in a content addressable memory system | Yuen H. Chan, Masood Ahmed Khan, Ed Seewann | 2007-01-23 |