Issued Patents All Time
Showing 25 most recent of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11881853 | True complement dynamic circuit and method for combining binary data | Michael Kugel, Amira Rozenfeld, Harry Barowski | 2024-01-23 |
| 11328110 | Integrated circuit including logic circuitry | Juergen Pille, Tobias Werner, Shankar Kalyanasundaram | 2022-05-10 |
| 11171142 | Integrated circuit with vertical structures on nodes of a grid | Juergen Pille, Albert Frisch, Tobias Werner, Dieter Wendel | 2021-11-09 |
| 11164879 | Microelectronic device with a memory element utilizing stacked vertical devices | Juergen Pille, Albert Frisch, Tobias Werner, Dieter Wendel | 2021-11-02 |
| 10831970 | Layout of a memory cell of an integrated circuit | Amira Rozenfeld, Shankar Kalyanasundaram, Ananth Nag Raja Darla, Rajesh Veerabhadraiah | 2020-11-10 |
| 10833089 | Buried conductive layer supplying digital circuits | Juergen Pille, Albert Frisch, Tobias Werner, Dieter Wendel | 2020-11-10 |
| 10804266 | Microelectronic device utilizing stacked vertical devices | Juergen Pille, Albert Frisch, Tobias Werner, Dieter Wendel | 2020-10-13 |
| 10593420 | Testing content addressable memory and random access memory | Harry Barowski, Sheldon B. Levenstein, Pradip Patel, Daniel Rodko, Gordon B. Sapp | 2020-03-17 |
| 10553282 | Content addressable memory cell and array | Ananth Nag Raja Darla, Praveen Patavardhan, Gordon B. Sapp | 2020-02-04 |
| 10170199 | Testing content addressable memory and random access memory | Harry Barowski, Sheldon B. Levenstein, Pradip Patel, Daniel Rodko, Gordon B. Sapp | 2019-01-01 |
| 10079070 | Testing content addressable memory and random access memory | Harry Barowski, Sheldon B. Levenstein, Pradip Patel, Daniel Rodko, Gordon B. Sapp | 2018-09-18 |
| 10002661 | Structure for reducing pre-charge voltage for static random-access memory arrays | Alexander Fritsch, Amira Rozenfeld, Dieter Wendel | 2018-06-19 |
| 9767872 | Current-mode sense amplifier and reference current circuitry | Alexander Fritsch, Gerhard Hellner, Michael Kugel | 2017-09-19 |
| 9727680 | Structure for reducing pre-charge voltage for static random-access memory arrays | Alexander Fritsch, Amira Rozenfeld, Dieter Wendel | 2017-08-08 |
| 9721049 | Structure for reducing pre-charge voltage for static random-access memory arrays | Alexander Fritsch, Amira Rozenfeld, Dieter Wendel | 2017-08-01 |
| 9721050 | Structure for reducing pre-charge voltage for static random-access memory arrays | Alexander Fritsch, Amira Rozenfeld, Dieter Wendel | 2017-08-01 |
| 9666278 | Content addressable memory array comprising geometric footprint and RAM cell block located between two parts of a CAM cell block | Alexander Fritsch, Werner Juchmes, Shankar Kalyanasundaram | 2017-05-30 |
| 9564188 | Current-mode sense amplifier and reference current circuitry | Alexander Fritsch, Gerhard Hellner, Michael Kugel | 2017-02-07 |
| 9536608 | Content addressable memory device | Alexander Fritsch, Amira Rozenfeld, Gordon B. Sapp | 2017-01-03 |
| 9537474 | Transforming a phase-locked-loop generated chip clock signal to a local clock signal | Yuen H. Chan, Juergen Pille, Tobias Werner | 2017-01-03 |
| 9484073 | Current-mode sense amplifier | Alexander Fritsch, Gerhard Hellner, Iris Maria Leefken | 2016-11-01 |
| 9431098 | Structure for reducing pre-charge voltage for static random-access memory arrays | Alexander Fritsch, Amira Rozenfeld, Dieter Wendel | 2016-08-30 |
| 9431096 | Hierarchical negative bitline boost write assist for SRAM memory devices | Alexander Fritsch, Werner Juchmes, Michael Kugel | 2016-08-30 |
| 9401698 | Transforming a phase-locked-loop generated chip clock signal to a local clock signal | Yuen H. Chan, Juergen Pille, Tobias Werner | 2016-07-26 |
| 9098659 | Advanced array local clock buffer base block circuit | Osama Dengler, Thomas Froehnel, Juergen Pille | 2015-08-04 |